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BPM Microsystems’ cutting-edge technology to be displayed at DESIGN West 2013

BPM Microsystems’ cutting-edge technology to be displayed at DESIGN West 2013

HOUSTON — March 15, 2013 — BPM Microsystems announces that it will exhibit its award-winning 2800ISP parallel in-system device programmer in Booth #2134 at the DESIGN West conference and exhibition, scheduled to take place April 22-25, 2013 at the McEnery Convention Center in San Jose, CA.

The new 2800ISP incorporates the company’s 8th Generation site technology utilizing its Vector Engine Co-Processor® into a custom-designed test fixture, allowing its customers to program flash architectures including eMMC, PCM and Raw NAND, plus MCUs and other device technologies on-board after reflow. In 2012, the company added support for third party functional testing, such as boundary scan, with the capability to test up to 240 pins in addition to the 960 pins available for programming.

Ideal for medium- to high-volume production, the 2800ISP is configurable and can program up to 16 devices in parallel. Like all 8th Generation programmers, the 2800ISP with BPM’s Vector Engine Co-Processor is capable of achieving an amazing peak operating rate of 12.8 Gb per second. This solves the test bottleneck while allowing the operator to program the latest data just in time, all while attaining a very low programming cost per device.

For more information, meet with company representatives in Booth #2134 at the show.

 

BPM Microsystems to demonstrate the 2800ISP at the Houston SMTA Expo

BPM Microsystems to demonstrate the 2800ISP at the Houston SMTA Expo

HOUSTON — March 13, 2013 — BPM Microsystems announces that it will exhibit its award-winning 2800ISP parallel in-system device programmer at the Houston SMTA Expo, scheduled to take place March 14, 2013 at the Stafford Centre in Stafford, TX.

The new 2800ISP incorporates the company’s 8th Generation site technology utilizing its Vector Engine Co-Processor® into a custom-designed test fixture, allowing its customers to program flash architectures including eMMC, PCM and raw NAND, plus MCUs and other device technologies on-board after reflow. In 2012, the company added support for third party functional testing, such as boundary scan, with the capability to test up to 240 pins in addition to the 960 pins available for programming.

Ideal for medium- to high-volume production, the 2800ISP is configurable and can program up to 16 devices in parallel. Like all 8th Generation programmers, the 2800ISP with BPM’s Vector Engine Co-Processor is capable of achieving an amazing peak operating rate of 12.8 Gb per second. This solves the test bottleneck while allowing the operator to program the latest data just in time, all while attaining a very low programming cost per device.

 

 

 

Tekno-sip brings BPM Microsystems’ 3800 programmer to Brazil for FIEE 2013

Tekno-sip brings BPM Microsystems’ 3800 programmer to Brazil for FIEE 2013

HOUSTON — February 2013 — BPM Microsystems announces that Tekno-sip will display the 3800 automated production programmer in Booth # I78 at the 27th International Electrical, Energy and Automation Industry Fair (FIEE) scheduled to take place April 1-5, 2013 at the Anhembi Exhibition Hall in Brazil.

Introduced in 2010, the 3800 automated universal production programmer supports microcontrollers, NAND flash, NOR flash, serial flash, managed NAND flash, E/EPROM, flash EPROM, and other technologies with densities up to an 8 Eb theoretical limit. Additionally, the system supports devices with voltages down to 0.7 (Vdd).

The 3800 is powered by BPM Microsystems’ Vector Engine Co-Processor® now with BitBlast technology. The new technology provides an extra boost to programming speeds for managed NAND devices that utilize the eMMC interface, which drastically increases overall throughput.

For more information, meet with BPM Microsystems’ distributor, Tekno-sip, in Booth #I78 at the FIEE Fair.