NXP Semiconductors LPC1111FHN33/102_FVE4ASML33QFNTA QFN(33) Device

Adapters for Automated Programmers

Adapters for Manual Programmers

Adapters for Engineering Programmers

Last Updated: 05/18/2023

IMPORTANT: Algorithm support for this device selection is developed. Device samples are needed for QA testing and full release in BPWin.For information on how to obtain an expedited release of this device support please contact BPM Microsystems at:Inside Sales713–688-4600inside_sales@bpmmicro.comInformation on expected socket module support can be found our web page at: http://www.www.bpmmicro.com/find-your-device/**Please note that receipt of device samples and QA testing must be completed before socket module support can be validated. Microcontroller with Flash Memory. 8KByte Flash memory is located at address range 0000h-1FFFh. Device Configure option Auto-run code in Flash after reset’ can be set to change buffer location 1Ch to contain the 2’s complement of the check-sum of the remaining interrupt vectors. Code read protection (CRP) is enabled by programming the Flash address location 2FCh (User flash sector 0). CRP works in conjunction with the following values (Little Endian Byte format): CRP1 is enabled if value 12345678h(305419896 Decimal) is programmed. Access to chip via the SWD pins is disabled. CRP2 is enabled if value 87654321h(2271560481 Decimal) is programmed. Access to chip via the SWD pins is disabled. The following ISP commands are also disabled: Read Memory Write to RAM Go Copy RAM to flash and Compare. ISP erase command only allows erasure of all user sectors. CRP3 is enabled if value 43218765h(1126270821 Decimal) is programmed. Access to chip via the SWD pins is disabled. ISP entry by pulling P2.10 LOW is disabled if a valid user code is present in flash sector 0. When this mode is invoked no future factory testing can be performed on the device. CRP settings can be modified under Device > Configure. EEPROM is not yet supported for this device. ‘