STMicroelectronics STM32F411VET6TR LQFP(100) Device
Adapters for Automated Programmers
| 6th Gen | 7th Gen |
| FASMR100LQFPZA | FX4ASMR100LQFPZA, FASMR100LQFPZA, LX4ASMR100LQFPZA (repl.) |
Adapters for Manual Programmers
| 6th Gen | 7th Gen |
| FASMR100LQFPZA | FX4ASMR100LQFPZA, FASMR100LQFPZA, LX4ASMR100LQFPZA (repl.) |
Adapters for Engineering Programmers
| 6th Gen | 7th Gen |
| FASMR100LQFPZA | FX4ASMR100LQFPZA, FASMR100LQFPZA, LX4ASMR100LQFPZA (repl.) |
Last Updated: 05/18/2023
If the device is not yet supported by your BPM programmer (Generation), request Device Support
Note
IMPORTANT: ARM-based 32-bit MCU with Flash
| Device Type: | ARM Cortex-M4 32-bit MCU |
| Device Memory Type: | 512K-Byte Flash + 512-Byte OTP Area |
| Algorithm Programming Method: | Parallel Protocol Via Custom Bootloader |
Memory Organization:
| Memory Type |
Attributes* |
Included in DefaultRange (Y/N) | DUT Physical ByteAddress(hex) | BPWin Buffer ByteAddress(hex) |
| Flash Memory | R/W/E | Yes | 0800_0000 – 0807_FFFF | 0800_0000 – 0807_FFFF |
| OTP Area | R/W | No | 1FFF_7800 – 1FFF_79FF | 1FFF_7800 – 1FFF_79FF |
| OTP Lock Block | R/W | No | 1FFF_7A00 – 1FFF_7A0F | 1FFF_7A00 – 1FFF_7A0F |
| Option Bytes | R/W/E | No | 1FFF_C000 – 1FFF_C00F | 1FFF_C000 – 1FFF_C00F |
| Default Algorithm Range | — | — | 0800_0000 – 0807_FFFF | 0800_0000 – 0807_FFFF |
* R:Read only W: One time programmable (OTP) R/W: readable and one time programmable (OTP) R/W/E: readable and rewritable if not locked. Option Byte Mapping: RDP USER nSPRMOD and nWRPi bits can be changed under Device Config->Settings.
| Data Pattern Address | Bits [15:8] | Bits [7:0] |
| 1FFFC000h | RDP | USER |
| 1FFFC002h | Reserved | Reserved |
| 1FFFC004h | Reserved | Reserved |
| 1FFFC006h | Reserved | Reserved |
| 1FFFC008h | nSPRMOD [15] Reserved [14:8] | Reserved [7:6] nWRPi [5:0] |
| 1FFFC00Ah | Reserved | Reserved |
| 1FFFC00Ch | Reserved | Reserved |
| 1FFFC00Eh | Reserved | Reserved |
| 1. | The OTP Lock Block must only contain 00h or FFh. |
| 2. | Only non-reserved bits will be checked and read. |
| 3. | These option bytes are not verified after the Program operation with this algorithm if device is set to Read Protection Level 1 or Level 2. |
| 4. | The Erase operation will erase the entire Flash Memory except Option Bytes. Erase will also set the device back to Read Protection Level 0 if the device was not programmed to Read Protection Level 2. |
| 5. | If RDP protection is set to Level 1 (Non-AAh Non-CCh) the main Flash Memory will be totally inaccessible. |
| 6. | If RDP protection is set to Level 2 (CCh) device debug interface will be disabled. Any operation on the device will fail. |
| 7. | Stand-alone operations may fail if the device is programmed with executable code. |
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BPM does not sell programmable devices, nor do we program devices directly. BPM makes programmers and accessories to make programming in-house fast, easy, and profitable.
Additional information
| Manufacturer | STMicroelectronics |
|---|---|
| Packages | LQFP(100) |
| Part Number | STM32F411VET6TR |
| Set programming | Yes |
| Vcc(program) | 3.3 |
| Package |