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Texas Instruments CDCI6214RGER LAP(24) Device

Adapters for Automated Programmers

8th Gen 9th Gen
FVE4ASMR24QFNB, FVE4ASMR24QFNB FVE4ASMR24QFNB

Adapters for Manual Programmers

8th Gen 9th Gen
FVE4ASMR24QFNB, FVE4ASMR24QFNB FVE4ASMR24QFNB

Adapters for Engineering Programmers


Last Updated: 05/18/2023

If the device is not yet supported by your BPM programmer (Generation), request Device Support

Note


IMPORTANT: Device Information:

Device Type: Ultra Low Power Clock Generator
Algorithm Programming Method: I2C

Memory Organization:

Section

Attributes(*)

Included in default Range (Y/N) DUT Physical Byte Address (hex)(if this area is selected/Activated) BPWin Buffer Byte Address (hex)
EEPROM Text File R/W/E Yes N/A 0 – 1FFFh

* R:Read only W: One time programmable (OTP) R/W: readable and one time programmable (OTP) R/W/E: readable and rewritable if not locked. Any configurations listed under Device-Specific’ in the menu item Device-> Settings will be written to the DUT during ‘Program’ operation. Special Device Considerations:

1. When loading the data pattern select Load File As ‘Binary.’ 2. This algorithm will parse a 3 column text file. 3. Serialization is not supported for this device. 4. Read will print out the contents of the EEPROM to the output window. 5. Read operation will not ouput valid data to the buffer. 6. Program instructions must start at address zero and proceed without skipping any addresses. 7. Program will only run operations after ‘#Program’ in the data file. 8. Verify will only run operations after ‘#Verify’. Verify will not run program operations. 8. This algorithm only supports commands related to the EEPROM.

BPM does not sell programmable devices, nor do we program devices directly. BPM makes programmers and accessories to make programming in-house fast, easy, and profitable.

Additional information

8-bit Bytes

16384

Manufacturer

Texas Instruments

Packages

LAP(24)

Part Number

CDCI6214RGER

Set programming

Yes

Vcc(program)

3.3

Package