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Analog Devices AD9547BCPZ LFCSP_VQ(64) Device

Adapters for Automated Programmers

6th Gen 7th Gen 9th Gen
FASMR64MLFN, LASMR64MLFN (repl.) FASMR64MLFN, LASMR64MLFN (repl.) LASMR64MLFN

Adapters for Manual Programmers

6th Gen 7th Gen 9th Gen
FSMR64MLFN, FASMR64MLFN, LASMR64MLFN (repl.) FSMR64MLFN, FASMR64MLFN, LASMR64MLFN (repl.) LASMR64MLFN

Adapters for Engineering Programmers

6th Gen 7th Gen
FSMR64MLFN, FASMR64MLFN, LASMR64MLFN (repl.) FSMR64MLFN, FASMR64MLFN, LASMR64MLFN (repl.)

Last Updated: 05/18/2023

If the device is not yet supported by your BPM programmer (Generation), request Device Support

Note


IMPORTANT: Network Clock Generator with EEPROM. The registers are mapped in the Data Pattern as following: System Clock: [100h-108h]. Gerneral Configuration: [200h-214h]. DPLL Registers: [300h-305h] [307h-31Bh]. Clock Distribution Output Configuration: [400h-417h]. Reference Input Configuration: [500h-507h]. Profile Registers: [600h-6FFh] [700h-7FFh]. Operational Controls: [A00h-A02h] [A0Ch-A10h]. Status Readback(Read Only): [D00h-D19h]. EEPROM storage sequence: [E10h-E3Fh]. Register [A0Ch-A0Eh] and [E10h-E3Fh] are skipped during Verify and Compare. [D00h-D19h] are read only registers. [C00h-C07h] are inactive in the register space and can be used to store revision information. Use the default value in data sheet when writing to registers and/or bits marked as unused. Reading Virgin Samples is not recommended by semihouse.

BPM does not sell programmable devices, nor do we program devices directly. BPM makes programmers and accessories to make programming in-house fast, easy, and profitable.

Additional information

Manufacturer

Analog Devices

Packages

LFCSP_VQ(64)

Part Number

AD9547BCPZ

Set programming

Yes

Vcc(program)

1.8

Package
8-bit Bytes