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Intel JS28F128J3F75 TSOP(56) Device

If the device is not yet supported by your BPM programmer (Generation), request Device Support

Note


IMPORTANT: This device contains a 128 bit Protection Register. The first 64 bits are mapped from 1000000h to 1000007h in the Data Pattern. These bits are pre-programmed by the manufacturer and cannot be modified. The last 64 bits of the Protection Register are mapped from 1000008h to 100000Fh in the Data Pattern and are one-time-user-programmable. When erasing Protection Register and OBLA the programmer will blank-check these bits and will fail erase if they are not blank. Locking the user-programmable segment of the Protection Register is a one time only operation. The Erasable Block Lock-bit Array(EBLA) Block Locking Configuration Register(BLCR) and OTP Block Lock-bit Array(OBLA) can be set under Device > Configure. To use the OBLA for permanent block locking bit 7 of BLCR must be set to 0 otherwise OBLA will be skipped during program and may fail verify. If certain bits of BLCR are programmed to 0 the Erasable Block Lock-Bit Array(EBLA) and/or OBLA may not be programmed any more. This algorithm will reject a part if bit 0 bit 2 bit 6 or bit 7 of BLCR is not blank. It’s suggested that the BLCR value is known to the user before programming. The default Device Range is set to [000000h-7FFFFFh]. Please select Entire File’ under Device > Range if Protection Registers need to be included. Password Access Feature is currently not supported. ‘

BPM does not sell programmable devices, nor do we program devices directly. BPM makes programmers and accessories to make programming in-house fast, easy, and profitable.

Additional information

Manufacturer

Intel

Packages

TSOP(56)

Part Number

JS28F128J3F75

Set programming

Yes

Vcc(program)

3.3

Package