Intel RD28F256SJ3AM BGA(80) Device

Adapters for Automated Programmers

Adapters for Manual Programmers

Adapters for Engineering Programmers

Last Updated: 05/18/2023

IMPORTANT: Default buffer value’ must be set to FFh before loading the programming data pattern.This device contains two 28F128J3A chips. In the buffer addresses 0h-7FFFFFh are forchip 1 addresses 800000h-FFFFFFh are for chip 2. In Device/Configure blocks 0-127 arefor Chip 1 blocks 128-255 are for Chip 2. Each 28F128J3A has 128-bit Protection Register.The first 64 bits are pre-programmed by the manufacturer and cannot be modified while theother 64 bits (User Register) are user programmable. The 128 bits Protection Register of chip 1are located at buffer addresses 2000000h-200000Fh. The 128 bits Protection Register of chip 2are located at buffer addresses 2000010h-200001Fh. User Register of both chips can be lockedby setting Lockout User Register to ENABLE under Device/Configure. However locking the User Registeris a one-time only operation. ‘