Microchip Technology PIC24F04KA201-I/SS SSOP(20) Device
Adapters for Automated Programmers
| 6th Gen | 7th Gen |
| FASM20SS, FASM20SSA, FASM28SS, FASM28SSA, FASM24SS (obs.) | FASM20SS, FASM20SSA, FASM28SS, FASM28SSA, FASM24SS (obs.) |
Adapters for Manual Programmers
| 6th Gen | 7th Gen |
| FSM20SS, FSM20SSA, FSM28SS, FSM28SSA, FASM20SS, FASM20SSA, FASM28SS, FASM28SSA, FASM24SS (obs.) | FSM20SS, FSM20SSA, FSM28SS, FSM28SSA, FASM20SS, FASM20SSA, FASM28SS, FASM28SSA, FASM24SS (obs.) |
Adapters for Engineering Programmers
| 6th Gen | 7th Gen |
| FSM20SS, FSM20SSA, FSM28SS, FSM28SSA, FASM20SS, FASM20SSA, FASM28SS, FASM28SSA, FASM24SS (obs.) | FSM20SS, FSM20SSA, FSM28SS, FSM28SSA, FASM20SS, FASM20SSA, FASM28SS, FASM28SSA, FASM24SS (obs.) |
Last Updated: 05/18/2023
If the device is not yet supported by your BPM programmer (Generation), request Device Support
Note
IMPORTANT: Microcontroller with User Flash Code Memory (1.375Kx24-bit) The Code Memory is a 24 bit memory addressed from [0h-15FFh] in the Data Pattern. The Code Memory is a 24-bit value on a 32-bit boundary. This algorithm assumes Little Endian format for programming data. The Configuration bytes are located at Buffer addresses [1F00000h-1F0001Fh]. Configuration bytes are an 8-bit value on a 32-bit boundary. The Configuration bytes may be set from Device Configure or from the above mentioned addresses in the Data Pattern. All unimplemented bit locations must be set to zeros. Please use help notes in Device->Configure for more information about bit identities and reserved bit locations or see Microchip specifications. The Sum’ command generates the checksum calculation as specified by Microchip. ‘
BPM does not sell programmable devices, nor do we program devices directly. BPM makes programmers and accessories to make programming in-house fast, easy, and profitable.
Additional information
| Manufacturer | Microchip Technology |
|---|---|
| Packages | SSOP(20) |
| Part Number | PIC24F04KA201-I/SS |
| Vcc(program) | 3.3 |
| Package |