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Micron JS28F128J3F75G TSOP(56) Device

Micron JS28F128J3F75G TSOP(56) Device

Adapters for Automated Programmers

8th Gen 9th Gen Flashstream
FVE4ASMR56TDK, FVE4ASMR56TD, FVE4ASM56TD, FVE4ASMR56TD, FVE4ASMR56TDK, FVE4ASM56TD FVE4ASMR56TD, FVE4ASMR56TDK, FVE4ASM56TD FVE4ASMR56TDK, FVE4ASMR56TD, FVE4ASM56TD, FVE4ASMR56TD, FVE4ASMR56TDK, FVE4ASM56TD

Adapters for Manual Programmers

8th Gen 9th Gen Flashstream
FVE4ASMR56TDK, FVE4ASMR56TD, FVE4ASM56TD, FVE4ASMR56TD, FVE4ASMR56TDK, FVE4ASM56TD FVE4ASMR56TD, FVE4ASMR56TDK, FVE4ASM56TD FVE4ASMR56TDK, FVE4ASMR56TD, FVE4ASM56TD, FVE4ASMR56TD, FVE4ASMR56TDK, FVE4ASM56TD

Adapters for Engineering Programmers

Last Updated: 05/18/2023

If the device is not yet supported by your BPM programmer (Generation), request Device Support

Request Support Options

Note

IMPORTANT:

Device Type: Flash Memory
Device Size: 128 Mbit
Algorithm Programming Method: Parallel Communication Protocol

Memory Organization:

Memory Type

Attributes(*)

 Included in default Range (Y/N) DUT Physical Byte Address(hex)(if this area is selected/Activated) BPWin Buffer Byte Address(hex)
[Main Flash Memory] [R/W/E] [Yes] [0000000 – 07FFFFF] [0000000 – 07FFFFF]
[128-bit Protection Register] [R/W/E] [No] [1000000 – 1000007] [1000000 – 1000007]
Default Algorithm Range — — [0000000 – 07FFFFF] [0000000 – 07FFFFF]

* R:Read only W: One time programmable (OTP) R/W: readable and one time programmable (OTP) R/W/E: readable and rewritable if not locked. Any configurations listed under Device-Specific’ in the menu item Device-> Settings will be written to the DUT during ‘Program’ operation regardless of memory range selection. Special Device Considerations:

This device contains a 128 bit Protection Register. The first 64 bits are mapped from 1000000h to 1000007h in the Data Pattern. These bits are pre-programmed by the manufacturer and cannot be modified. The last 64 bits of the Protection Register are mapped from 1000008h to 100000Fh in the Data Pattern and are one-time-user-programmable. When erasing Protection Register and OBLA the programmer will blank-check these bits and will fail erase if they are not blank. Locking the user-programmable segment of the Protection Register is a one time only operation. The Erasable Block Lock-bit Array(EBLA) Block Locking Configuration Register(BLCR) and OTP Block Lock-bit Array(OBLA) can be set under Device > Configure. To use the OBLA for permanent block locking bit 7 of BLCR must be set to 0 otherwise OBLA will be skipped during program and may fail verify. If certain bits of BLCR are programmed to 0 the Erasable Block Lock-Bit Array(EBLA) and/or OBLA may not be programmed any more. This algorithm will reject a part if bit 0 bit 2 bit 6 or bit 7 of BLCR is not blank. It’s suggested that the BLCR value is known to the user before programming. The default Device Range is set to [000000h-7FFFFFh]. Please select ‘Entire File’ under Device > Range if Protection Registers need to be included. Password Access Feature is currently not supported.

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BPM does not sell programmable devices, nor do we program devices directly. BPM makes programmers and accessories to make programming in-house fast, easy, and profitable.

Additional information

Manufacturer

Micron
Packages

TSOP(56)
Part Number

JS28F128J3F75G
Set programming

Yes
Vcc(program)

3.3
Package