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Renesas R7F701421EAFB#KA0 (Custom 02) QFP(144) Device

Adapters for Automated Programmers

9th Gen
FVE2ASMR144QPW

Adapters for Manual Programmers

9th Gen
FVE2ASMR144QPW

Adapters for Engineering Programmers


Last Updated: 05/18/2023

If the device is not yet supported by your BPM programmer (Generation), request Device Support

Note


IMPORTANT: [This is a custom algorithm. This algorithm has 32-bit precision in the DataFlash region.]

Device Type: RH850G3M CPU core Microcontroller
Device Size: 2MB Code Flash + 32kB User Area + 64kB Data Flash
Algorithm Programming Method: 3-Wire Serial I/O Mode.

Memory Organization:

Memory Type

Attributes(*)

Included in default Range (Y/N) DUT Physical Byte Address (hex)(if this area is selected/Activated) BPWin Buffer Byte Address (hex)
Code Flash R/W/E Yes 0000_0000 – 001F_FFFF 0000_0000 – 001F_FFFF
User Area Flash R/W/E Yes 0100_0000 – 0100_7FFF 0100_0000 – 0100_7FFF
Data Flash (†) R/W/E Yes FF20_0000 – FF20_FFFF FF20_0000 – FF20_FFFF
Default Algorithm Range 0000_0000 – FF20_FFFF 0000_0000 – FF20_FFFF

*R:Read only W: One time programmable (OTP) R/W: readable and one time programmable (OTP) R/W/E: readable and rewritable if not locked. †Data Flash range is programmed & verified with 32-bit precision. Any configurations listed under Device-Specific’ in the menu item Device-> Settings will be written to the DUT during ‘Program’ operation regardless of memory range selection. Special Device Considerations:

Option Description
Security Flag Set Bit 5 to 0 will disable Erase. Set Bit 6 to 0 will disable Program. Set Bit 7 to 0 will disable Read.Bits 4 to 0 are reserved and should be set to 1s.The Security Byte cannot be erased and once bit 5 is programmed to 0the whole chip is secured and no further operations can be performed.
1. Verification for this device is performed using the internal CRC feature of the device.
The Data Pattern CRC is compared and validated against the CRC value returned internally by the device.
Device specifications provide details on how this CRC is calculated.
2. Renesas Flash Programmer Image File (*.rpi) file format support added with features of ISEID code Option bytes.
3. FlashOptions should be in correct-format in RPI file.
4. The Security Flag and ID code can be set in the Secure command.
5. Once ID code has been set under the Secure command.
the sample will check ID Authentication during all standard operations.it cannot be reset.
6. This algorithm supports Firmware version RH850 V3 or later.
7. Once Validate ICU-S is set to True(i.e enabled ICU-S/ISE under FlashOptions).Stand-alone verify and compare will not be supported in the Data Flash range.
8. Serialization is not supported.
9. Loading an .rpi file automatically sets configurations and security. Configuration inputs are overwritten and cannot be changed.

ID Code bytes can only be programmed by loading an .rpi file with ID protection set(check RPI file thoroughly).

10. Unprogrammed parts of the Data Flash will be in the erased state and readback data is in an unkown state.
11. Connect processing routines will attempt to unlock during every operation if the ID the is programmed once.
And the Algo will read the deviceID/Electronic DevID as 00000000 if the ID Code Authentication Mode Get fails (i.e wrong ID Code password in RPI fileso don’t ignore the ID check).

BPM does not sell programmable devices, nor do we program devices directly. BPM makes programmers and accessories to make programming in-house fast, easy, and profitable.

Additional information

8-bit Bytes

4280352768

Manufacturer

Renesas

Packages

QFP(144)

Part Number

R7F701421EAFB#KA0

Set programming

Yes

Vcc(program)

3.3

Package