Renesas uPD70F4004M1GJA QFP(144) Device
Adapters for Automated Programmers
| 8th Gen |
| FVE2ASMR144LQFPGK, FVE2ASMR144LQFPGK |
Adapters for Manual Programmers
| 8th Gen |
| FVE2ASMR144LQFPGK, FVE2ASMR144LQFPGK |
Adapters for Engineering Programmers
Last Updated: 05/18/2023
If the device is not yet supported by your BPM programmer (Generation), request Device Support
Note
IMPORTANT:
| Device Type: | V850E2 CPU core |
| Device Size: | 768KByte Code Flash + 32kByte Data Flash |
| Algorithm Programming Method: | 3-Wire Serial I/O Mode. |
Memory Organization:
| Memory Type |
Attributes(*)
|
Included in default Range (Y/N) | DUT Physical Byte Address(hex)(if this area is selected/Activated) | BPWin Buffer Byte Address(hex) |
| Code Flash | R/W/E | Yes | 0000_0000 – 000B_FFFF | 0000_0000 – 000B_FFFF |
| Data Flash | R/W/E | Yes | 0200_0000 – 0200_7FFF | 0200_0000 – 0200_7FFF (w/ID Tags) |
| Default Algorithm Range | — | — | 0000_0000 – 0200_7FFF | 0000_0000 – 0200_7FFF |
* R:Read only W: One time programmable (OTP) R/W: readable and one time programmable (OTP) R/W/E: readable and rewritable if not locked. Any configurations listed under Device-Specific’ in the menu item Device-> Settings will be written to the DUT during ‘Program’ operation regardless of memory range selection. Special Device Considerations: For AutoRange purposes each block contains 4096 bytes. Data Pattern containing Data Flash must include valid ID Tags. Serialization is not supported. Erase function for a Blank secured device is not supported if chip erase is disabled. Set OCD ID is curretly not supported. Verification for this device is performed using the internal CRC feature of the device. The Data Pattern CRC is compared and validated against the CRC value returned internally by the device. Device specifications provide details on how this CRC is calculated. Secure must be enabled to program or verify option byte and security byte. The Option Byte 0 can be set under Device->Configure and programmed with Secure command.
| Bit |
Attributes and Details
|
| Bit 1 | Set Bit 1 to 0 will disable Boot cluster rewrite |
| Bit 2 | Set Bit 2 to 0 will disable Block Erase |
| Bit 3 | Set Bit 3 to 0 will disable Chip Erase. Once bit 3 is programmed to 0 the whole chip is secured and no further operations can be performed |
| Bit 4 | Set Bit 4 to 0 will disable Program. Bit 4 can be erased through Chip Erase |
| Bit 5 | Set Bit 5 to 0 will disable Read. Bit 5 can be erased through Chip Erase |
| Bits 0 6 & 7 | Bits 0 6 & 7 are reserved and should be set to 1s. |
*The Security Byte can be set under Device->Configure and programmed with Secure command. Security for this device cannot be verified. ‘
BPM does not sell programmable devices, nor do we program devices directly. BPM makes programmers and accessories to make programming in-house fast, easy, and profitable.
Additional information
| 8-bit Bytes | 33587200 |
|---|---|
| Manufacturer | Renesas |
| Packages | QFP(144) |
| Part Number | uPD70F4004M1GJA |
| Vcc(program) | 3.3 |
| Package |