Benchmarq bq4850YMA DIP(32) Device
Adapters for Automated Programmers
| 6th Gen | 7th Gen |
| FASM48D300, FASM48D600 | FASM48D300, FASM48D600 |
Adapters for Manual Programmers
| 6th Gen | 7th Gen | 9th Gen |
| FSM32DG, FSM48D, FSM48DH, FSM48DC, FSM48DF, FSM48DL, FSM48DE, FASM48D300, FASM48D600, FSM48DB (obs.), LX4SM32DG (repl.) | FSM32DG, FSM48D, FSM48DH, FSM48DC, FSM48DF, FSM48DL, FSM48DE, FASM48D300, FASM48D600, FSM48DB (obs.), LX4SM32DG (repl.), FSM32DG, FSM48D, FSM48DH, FSM48DF, FSM48DC, FSM48DL, FSM48DE, FASM48D300, FASM48D600, FSM48DB (obs.), LX4SM32DG (repl.) | LX4SM32DG |
Adapters for Engineering Programmers
| 6th Gen | 7th Gen |
| FSM32DG, FSM48D, FSM48DH, FSM48DC, FSM48DF, FSM48DL, FSM48DE, FASM48D300, FASM48D600, FSM48DB (obs.), LX4SM32DG (repl.) | FSM32DG, FSM48D, FSM48DH, FSM48DC, FSM48DF, FSM48DL, FSM48DE, FASM48D300, FASM48D600, FSM48DB (obs.), LX4SM32DG (repl.) |
Last Updated: 05/18/2023
If the device is not yet supported by your BPM programmer (Generation), request Device Support
Note
IMPORTANT: RTC Module With 512Kx8 NVSRAM.This device may generate errors at the last eight addresses [7FFF8h-7FFFFh]when compared. The reason for this is that the clock circuit may be running after the partis programmed depending on what values are programmed into the clock registers.The bit D7 and bit D6 of the control register at address 7FFF8h are set to the following values:before Programming the clock 10(bin) after Program 00(bin);before Reading the clock 01(bin) after Read 00(bin).
BPM does not sell programmable devices, nor do we program devices directly. BPM makes programmers and accessories to make programming in-house fast, easy, and profitable.
Additional information
| Manufacturer | Benchmarq |
|---|---|
| Packages | DIP(32) |
| Part Number | bq4850YMA |
| Set programming | Yes |
| Vcc(program) | 5 |
| 8-bit Bytes | |
| Package |