Adapters for Automated Programmers
8th Gen | 9th Gen | Flashstream |
FVE4ASMR16SD, FVE4ASM16SD, FVE4ASMR16SD, FVE4ASM16SD | FVE4ASMR16SD, FVE4ASM16SD | FVE4ASMR16SD, FVE4ASM16SD, FVE4ASMR16SD, FVE4ASM16SD |
Adapters for Manual Programmers
8th Gen | 9th Gen | Flashstream |
FVE4ASMR16SD, FVE4ASM16SD, FVE4ASMR16SD, FVE4ASM16SD | FVE4ASMR16SD, FVE4ASM16SD | FVE4ASMR16SD, FVE4ASM16SD, FVE4ASMR16SD, FVE4ASM16SD |
Adapters for Engineering Programmers
Last Updated: 05/18/2023
If the device is not yet supported by your BPM programmer (Generation), request Device Support
Note
IMPORTANT:
Device Type: | SPI Flash Memory |
Device Size: | 512M-bit |
Algorithm Programming Method: | SPI |
Memory Organization:
Memory Type |
Attributes(*)
|
Included in default Range (Y/N) | DUT Physical Byte Address(hex)(if this area is selected/Activated) | BPWin Buffer Byte Address(hex) |
Main Flash Area | R/W/E | Yes | 0000_0000 – 03FF_FFFF | 0000_0000 – 03FF_FFFF |
OTP | R/W | No | 0400_0010 – 0400_03FF | 0400_0010 – 0400_03FF | Password | R/W | No | 0400_0400 – 0400_0407 | 0400_0400 – 0400_0407 |
Default Algorithm Range | — | — | 0000_0000 – 03FF_FFFF | 0000_0000 – 03FF_FFFF |
* R/W: readable and one time programmable (OTP) R/W/E: readable and rewritable if not locked. Any configurations listed under Device-Specific’ in the menu item Device->Settings will be written to the DUT during ‘Program’ operation regardless of memory range selection. Special Device Considerations:
1. | Serialization Supported: | Yes |
2. | The Factory Programmed 128-bit random number located at the beginning of the OTP regioncannot be programmed. The data in this number will not be shown in the Buffer Editor. | |
3. | OTP Lock bits are located in Buffer Addresses [0400_0010h – 0400_0013h]. If any of these bitsare programmed this algorithm will not be able to program additional bits in the OTP region. | |
4. | OTP Reserved bits are located in Buffer Addresses [0400_0014h – 0400_001Fh]. | |
5. | The correct password value located in Buffer Addresses [0400_0400h – 0400_0407h] may only be readbefore the Password Protection Mode in the ASP Register (ASP[2]) bit has been programmed to ‘0’. | |
5. | The Persistent Protection Bits (PPB) may be programmed under Device->Settings.Each Group is divided into 256K-Byte blocks of data. This is condensed version of PPBAR for each sector. |
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BPM does not sell programmable devices, nor do we program devices directly. BPM makes programmers and accessories to make programming in-house fast, easy, and profitable.
Additional information
Manufacturer | Cypress |
---|---|
Packages | SOIC(16) |
Part Number | S25FL512SDSMFMG11 |
Set programming | Yes |
Vcc(program) | 3.6 |
8-bit Bytes | |
Package |