Dallas Semiconductor DS12887 DIP(24) Device
Adapters for Automated Programmers
| 6th Gen | 7th Gen |
| FASM48D300, FASM48D600 | FASM48D300, FASM48D600 |
Adapters for Manual Programmers
| 6th Gen | 7th Gen | 9th Gen |
| FSM32DG, FSM48D, FSM48DH, FSM48DC, FSM48DF, FSM48DL, FSM48DE, FASM48D300, FASM48D600, FSM48DB (obs.), LX4SM32DG (repl.) | FSM32DG, FSM48D, FSM48DH, FSM48DC, FSM48DF, FSM48DL, FSM48DE, FASM48D300, FASM48D600, FSM48DB (obs.), LX4SM32DG (repl.), FSM32DG, FSM48D, FSM48DH, FSM48DF, FSM48DC, FSM48DL, FSM48DE, FASM48D300, FASM48D600, FSM48DB (obs.), LX4SM32DG (repl.) | LX4SM32DG |
Adapters for Engineering Programmers
| 6th Gen | 7th Gen |
| FSM32DG, FSM48D, FSM48DH, FSM48DC, FSM48DF, FSM48DL, FSM48DE, FASM48D300, FASM48D600, FSM48DB (obs.), LX4SM32DG (repl.) | FSM32DG, FSM48D, FSM48DH, FSM48DC, FSM48DF, FSM48DL, FSM48DE, FASM48D300, FASM48D600, FSM48DB (obs.), LX4SM32DG (repl.) |
Last Updated: 05/18/2023
If the device is not yet supported by your BPM programmer (Generation), request Device Support
Note
IMPORTANT: Real Time Clock.The first 14 bytes contain the RTC time calendar alarm data andfour registers. All 128 bytes can be directly written except forthe following read-only memory: Registers C and D Bit 7 of Register Aand the high order bit of the seconds byte (clock data).This device may generate errors at the first 14 addresseswhen compared. The reason for this is that the clock circuit may berunning after the part is programmed.For example if registers A and B (address 1011) are programmed with 20h and 00h respectivelyyou will see the clock running by executing Read Compare or Sum command.
BPM does not sell programmable devices, nor do we program devices directly. BPM makes programmers and accessories to make programming in-house fast, easy, and profitable.
Additional information
| Manufacturer | Dallas Semiconductor |
|---|---|
| Packages | DIP(24) |
| Part Number | DS12887 |
| Set programming | Yes |
| Vcc(program) | 5 |
| 8-bit Bytes | |
| Package |