Dallas Semiconductor DS1691 DIP(28) Device
Adapters for Automated Programmers
| 6th Gen | 7th Gen |
| FASM48D300, FASM48D600 | FASM48D300, FASM48D600 |
Adapters for Manual Programmers
| 6th Gen | 7th Gen | 9th Gen |
| FSM32DG, FSM48D, FSM48DH, FSM48DC, FSM48DF, FASM48D300, FASM48D600, FSM48DB (obs.), LX4SM32DG (repl.) | FSM32DG, FSM48D, FSM48DH, FSM48DC, FSM48DF, FASM48D300, FASM48D600, FSM48DB (obs.), LX4SM32DG (repl.), FSM32DG, FSM48D, FSM48DH, FSM48DF, FSM48DC, FASM48D300, FASM48D600, FSM48DB (obs.), LX4SM32DG (repl.) | LX4SM32DG |
Adapters for Engineering Programmers
| 6th Gen | 7th Gen |
| FSM32DG, FSM48D, FSM48DH, FSM48DC, FSM48DF, FASM48D300, FASM48D600, FSM48DB (obs.), LX4SM32DG (repl.) | FSM32DG, FSM48D, FSM48DH, FSM48DC, FSM48DF, FASM48D300, FASM48D600, FSM48DB (obs.), LX4SM32DG (repl.) |
Last Updated: 05/18/2023
If the device is not yet supported by your BPM programmer (Generation), request Device Support
Note
IMPORTANT: Real Time Clock.Definition of the address map:[000h-07Fh] is BANK0;[080h-0FFh] is BANK1 (only four bytes 0C8h-0CBh are programmable);The first 14 bytes contain the RTC time calendar alarm data andfour registers.This device may generate errors at the first 14 addressesand in BANK1when compared. The reason for this is that the clock circuit may berunning after the part is programmed.The RCE bit (bit 4) in EXTENDED CONTROL REG 4B (0CBh) must be set to zeroor the user RAM may be cleared during power down.For detailed information please refer to Dallas Semiconductor data books.
BPM does not sell programmable devices, nor do we program devices directly. BPM makes programmers and accessories to make programming in-house fast, easy, and profitable.
Additional information
| Manufacturer | Dallas Semiconductor |
|---|---|
| Packages | DIP(28) |
| Part Number | DS1691 |
| Set programming | Yes |
| Vcc(program) | 5 |
| 8-bit Bytes | |
| Package |