Freescale Semiconductor MK20DX128VLF5 LQFP(48) Device
Adapters for Automated Programmers
| 6th Gen | 7th Gen |
| FASM48TQN, FASM48TQF, FASM48TQNA, FASM48TQ, FASM48TQA, FASM48TQD | FASM48TQN, FASM48TQF, FASM48TQNA, FASM48TQ, FASM48TQA, FASM48TQD |
Adapters for Manual Programmers
| 6th Gen | 7th Gen |
| FSM48TQN, FASM48TQN, FSM48TQF, FSM48TQNA, FSM48TQ, FSM48TQA, FSM48TQD, FASM48TQF, FASM48TQNA, FASM48TQ, FASM48TQA, FASM48TQD | FSM48TQN, FASM48TQN, FSM48TQF, FSM48TQNA, FSM48TQ, FSM48TQA, FSM48TQD, FASM48TQF, FASM48TQNA, FASM48TQ, FASM48TQA, FASM48TQD |
Adapters for Engineering Programmers
| 6th Gen | 7th Gen |
| FSM48TQN, FASM48TQN, FSM48TQF, FSM48TQNA, FSM48TQ, FSM48TQA, FSM48TQD, FASM48TQF, FASM48TQNA, FASM48TQ, FASM48TQA, FASM48TQD | FSM48TQN, FASM48TQN, FSM48TQF, FSM48TQNA, FSM48TQ, FSM48TQA, FSM48TQD, FASM48TQF, FASM48TQNA, FASM48TQ, FASM48TQA, FASM48TQD |
Last Updated: 05/18/2023
If the device is not yet supported by your BPM programmer (Generation), request Device Support
Note
IMPORTANT:
| Device Type: | Microcontroller ARM Cortex M4. |
| Device Size: | 128KB Flash Memory + 32KB FlexMemory Flash. |
| Algorithm Programming Method: | Ezport. |
Memory Organization:
| Memory Type |
Attributes(*)
|
Included in default Range (Y/N) | DUT Physical Byte Address(hex)(if this area is selected/Activated) | BPWin Buffer Byte Address(hex) |
| Program Flash Memory(Reset vectors) | R/W/E | Yes | 00000000 – 0001FFFF | 00000000 – 0001FFFF | Flash FlexNVM Memory | R/W/E | No | 00800000 – 00807FFF | 00800000 – 00807FFF |
| Default Algorithm Range | — | — | 0000000 – 0001FFFF | 0000000 – 0001FFFF |
* R:Read only W: One time programmable (OTP) R/W: readable and one time programmable (OTP) R/W/E: readable and rewritable if not locked. Any configurations listed under Device-Specific’ in the menu item Device-> Settings will be written to the DUT during ‘Program’ operation regardless of memory range selection.
Special Device Considerations:
| 1. | Address location [0x40C] corresponds to the Flash security byte(FSEC). There are two security bits (bit 0 and bit 1)in FSEC. Using a value of 1 for bit 0 is not supportable with this algorithm. If the datapattern has a value of 1 here it will be ignored during program.
| 2. |
The algorithm supports the 32-bit long word in Big-Endian byte order. Please make sure that the data file is also in such byte order. |
3. |
This algorithm does not support partitioning the FlexNVM. |
4. |
After a successful Program + Verify operation subsequent stand alone operations may fail if the programmed code
| 5. |
When mass erase is disabled(bit 4=’0′ bit 5=’1′) and device is secured the device is no longer accessible. |
| ||||||||
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BPM does not sell programmable devices, nor do we program devices directly. BPM makes programmers and accessories to make programming in-house fast, easy, and profitable.
Additional information
| Manufacturer | Freescale Semiconductor |
|---|---|
| Packages | LQFP(48) |
| Part Number | MK20DX128VLF5 |
| Vcc(program) | 3.3 |
| 8-bit Bytes | |
| Package |