Adapters for Automated Programmers
6th Gen | 7th Gen | 8th Gen | 9th Gen |
FASMR144PBGB | FX4ASMR144PBGB, FASMR144PBGB, LX4ASMR144PBGB (repl.) | FVE4ASMR144PBGB, FVE4ASMR144PBGB | FVE4ASMR144PBGB |
Adapters for Manual Programmers
6th Gen | 7th Gen | 8th Gen | 9th Gen |
FASMR144PBGB, FSMR144PBGB (obs.) | FX4ASMR144PBGB, FASMR144PBGB, FX4SMR144PBGB (obs.), FSMR144PBGB (obs.), LX4ASMR144PBGB (repl.) | FVE4ASMR144PBGB, FVE4ASMR144PBGB | FVE4ASMR144PBGB |
Adapters for Engineering Programmers
6th Gen | 7th Gen |
FASMR144PBGB, FSMR144PBGB (obs.) | FX4ASMR144PBGB, FASMR144PBGB, FX4SMR144PBGB (obs.), FSMR144PBGB (obs.), LX4ASMR144PBGB (repl.) |
Last Updated: 05/18/2023
If the device is not yet supported by your BPM programmer (Generation), request Device Support
Note
IMPORTANT: The following describes the Data Pattern setup: Addresses [0x0-0xFFFFF] is Flash. Address [0x40C] is Flash security byte(FSEC). There are two security bits(bit 0 and bit 1) and two mass erase bits(bit 4 and bit 5) in FSEC. When mass is disabled(bit 4=0′ bit 5=’1′) and device secured the device is no longer erase. Addresss [0x40D] is Flash Nonvolatile Option Byte(FOPT). There is EZPORT_DIS bit(bit 1) in FOPT Register. After programmed this bit to ‘0’ the Ezport operation is disabled. The device is no longer erase and reprogram. Erase must be enabled before programming otherwise Program operation will fail. The algorithm supports the 32 bit long word in Big-Endian byte order. Please make sure that the data file is also in such byte order. ‘
BPM does not sell programmable devices, nor do we program devices directly. BPM makes programmers and accessories to make programming in-house fast, easy, and profitable.
Additional information
Manufacturer | Freescale Semiconductor |
---|---|
Packages | BGA(144) |
Part Number | MK20FN1M0VMD10 |
Vcc(program) | 3.3 |
8-bit Bytes | |
Package |