GigaDevice Semiconductor Inc. GD25Q127CW3GY WSON(8) Device

Adapters for Automated Programmers

Adapters for Manual Programmers

Adapters for Engineering Programmers

Last Updated: 05/18/2023

IMPORTANT: Algorithm support for this device selection is developed. Device samples are needed for QA testing and full release in BPWin.For information on how to obtain an expedited release of this device support please contact BPM Microsystems at:Inside Sales713–688-4600inside_sales@bpmmicro.comInformation on expected socket module support can be found our web page at: http://www.www.bpmmicro.com/find-your-device/**Please note that receipt of device samples and QA testing must be completed before socket module support can be validated. 128M-bit Serial Flash. This algorithm uses Standard SPI mode to Program and Verify/Read the device. The status register bits can be set under Device > Configure. Erase must be selected if device to be programmed already has QE bit enabled. There are three 1024-Byte Security Registers with OTP lock independent from main memory. The default Device Range is set to [000000h-FFFFFFh].The security registers are mapped to [1001000-10013FF] [1002000-10023FF] and [1003000-10033FF] respectively. Please modify the range under Device > Range if any one of the Security Registers needs to be included.