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IDT IDT7201LA50DB CERDIP(28) Device

Adapters for Manual Programmers

6th Gen 7th Gen 9th Gen
FSM32DG, FSM48D, FSM48DH, FSM48DC, FSM48DF, FSM48DL, FSM48DE, FSM48DB (obs.) FX4SM32DG, FSM32DG, FSM48D, FSM48DH, FSM48DC, FSM48DF, FSM48DL, FSM48DE, FSM48DB (obs.), LX4SM32DG (repl.), FX4SM32DG, FSM32DG, FSM48D, FSM48DH, FSM48DF, FSM48DC, FSM48DL, FSM48DE, FSM48DB (obs.), LX4SM32DG (repl.) LX4SM32DG

Adapters for Engineering Programmers

6th Gen 7th Gen
FSM32DG, FSM48D, FSM48DH, FSM48DC, FSM48DF, FSM48DL, FSM48DE, FSM48DB (obs.) FX4SM32DG, FSM32DG, FSM48D, FSM48DH, FSM48DC, FSM48DF, FSM48DL, FSM48DE, FSM48DB (obs.), LX4SM32DG (repl.)

Last Updated: 05/18/2023

If the device is not yet supported by your BPM programmer (Generation), request Device Support

Note


IMPORTANT:

Device Type: FIFO Buffer
Device Size: 512 Bytes
Algorithm Programming method: Special


Memory Organization:

Memory Type

Attributes(*)

Included in default Range (Y/N) DUT Physical Byte Address(hex)(if this area is selected/Activated) BPWin Buffer Byte Address(hex)
Main Area W Yes 0000_0000 – 0000_01FF 0000_0000 – 0000_01FF
Default Algorithm Range 0000_0000 – 0000_01FF 0000_0000 – 0000_01FF

* R:Read only W:One time programmable (OTP) R/W:readable and one time programmable (OTP) R/W/E:readable and rewritable if not locked. Any configurations listed under Device-Specific’ in the menu item Device-> Settings will be written to the DUT during ‘Program’ operation regardless of memory range selection. Special Device Considerations:

This is a FIFO Buffer. There is no non-volatile memory inside this device.This device does not support stand alone verify or serialization.This algorithm is designed to test the device only.

BPM does not sell programmable devices, nor do we program devices directly. BPM makes programmers and accessories to make programming in-house fast, easy, and profitable.

Additional information

Manufacturer

IDT

Packages

CERDIP(28)

Part Number

IDT7201LA50DB

Vcc(program)

5

Package