Infineon(Siemens) IR3564BMCC02TYPBF QFN(40) Device
Adapters for Automated Programmers
| 8th Gen |
| FVE4ASMR40QNW, FVE4ASMR40QNW |
Adapters for Manual Programmers
| 8th Gen |
| FVE4ASMR40QNW, FVE4ASMR40QNW |
Adapters for Engineering Programmers
Last Updated: 05/18/2023
If the device is not yet supported by your BPM programmer (Generation), request Device Support
Note
IMPORTANT: This algorithm does not use the standard 3 column data pattern. Dual Output Digital Multi-Phase Controller. The multiple-time progammable (MTP) memory at device addresses 10h-90h is mapped to buffer addresses 10h-90h. The configuration file must have configuration data only. Register Address and Configuration Mask are automatically added. There is a limit on maximum number of programming attempts. If this limit is exceeded programming operation wil fail. Please refer to device specifications for details. The Trim registers are located at addresses 00-0Fh. The User area is located at 10h-67h. The Manufacturer area is located at 68h-90h. Compare/Read operations are disabled for this device. Serialization is not supported for this device. When loading .hex data pattern select Load File As ‘Straight.’ Device operation does not Program or Verify the device’s trim. ‘
BPM does not sell programmable devices, nor do we program devices directly. BPM makes programmers and accessories to make programming in-house fast, easy, and profitable.
Additional information
| 8-bit Bytes | 146 |
|---|---|
| Manufacturer | Infineon(Siemens) |
| Packages | QFN(40) |
| Part Number | IR3564BMCC02TYPBF |
| Vcc(program) | 3 |
| Package |