Intel GE28F128K3C115 BGA(56) Device

Adapters for Automated Programmers

Adapters for Manual Programmers

Adapters for Engineering Programmers

Last Updated: 05/18/2023

IMPORTANT: 128Mbit (8M x 16) Intel StrataFlash(R) Memory.Default buffer value’ must be set to FFh before loading the programming data pattern.Device contains 17 128-bit Protection Registers PR0 through PR16 located at address range[1000000h-100010Fh] in the buffer. Example: PR0[0x81-0x88] is located at [1000000h-100000Fh]PR1[0x8A-0x91] at [1000010h-100001Fh] and so on.PR0[63:0] are permanently programmed by Intel with a unique number for each flash device.PR0[127:64] and PR1 through PR16 are one-time programmable (OTP) and available for the user to program.If one or more OTP registers are programmed the range must be set to exclude the registers orErase will fail.The user-programmable registers can be individually locked. Once a Protection Register lock is setthe user segment of that register is locked and no more user bits of that register may be programmed.The Protection Register lock bits are OTP.’Verify after programming’ operation is redundant per Intel and can be set to ‘NONE’ under Device/Optionsfor faster programming time. ‘