Intel GE28F640J3C-115 BGA(48) Device
Adapters for Automated Programmers
| 6th Gen | 7th Gen |
| FXASM48UBGQ, FASM48UBGQ | FXASM48UBGQ, FASM48UBGQ |
Adapters for Manual Programmers
| 6th Gen | 7th Gen |
| FXSM48UBGQ, FSM48UBGQ, FXASM48UBGQ, FASM48UBGQ | FXSM48UBGQ, FSM48UBGQ, FXASM48UBGQ, FASM48UBGQ |
Adapters for Engineering Programmers
| 6th Gen | 7th Gen |
| FXSM48UBGQ, FSM48UBGQ, FXASM48UBGQ, FASM48UBGQ | FXSM48UBGQ, FSM48UBGQ, FXASM48UBGQ, FASM48UBGQ |
Last Updated: 05/18/2023
If the device is not yet supported by your BPM programmer (Generation), request Device Support
Note
IMPORTANT: Default buffer value’ must be set to FFh before loading the programming data pattern.This device contains 128 bit Protection Register. The first 64 bits are mapped from 800000h to800007h in the buffer. These bits are pre-programmed by the manufacturer and cannot be modified.The ‘Program’ ‘Compare’ and ‘Verify’ functions will ignore the factory-programmed area. Thelast 64 bits of the Protection Register are mapped from 800008h to 80000Fh in the buffer and areone-time-user-programmable. If this range is included in an Erase operation the programmer will performblank-check these bits. Erase operation will fail if the area is locked or not blank. If ‘Auto Range Detection’ is set toYES the OTP bits of this range will not be programmed or verified. Locking the user-programmablesegment of the Protection Register is a one time only operation. ‘
BPM does not sell programmable devices, nor do we program devices directly. BPM makes programmers and accessories to make programming in-house fast, easy, and profitable.
Additional information
| Manufacturer | Intel |
|---|---|
| Packages | BGA(48) |
| Part Number | GE28F640J3C-115 |
| Set programming | Yes |
| Vcc(program) | 3.3 |
| Package |