Intel JS28F128P33TF70 TSOP(56) Device
Adapters for Automated Programmers
| 6th Gen | 7th Gen | 9th Gen |
| FXASM56TE, FASM56TE, FASM56T | FX4ASM56TE, FXASM56TE, FASM56TE, FASM56T, LX4ASM56TE (repl.) | LX4ASM56TE |
Adapters for Manual Programmers
| 6th Gen | 7th Gen | 9th Gen |
| FXSM56TE, FSM56TE, FSM56TB, FXASM56TE, FASM56TE, FASM56T, FSM56T (obs.) | FX4SM56TE, FXSM56TE, FSM56TE, FSM56TB, FX4ASM56TE, FXASM56TE, FASM56TE, FASM56T, FSM56T (obs.), LX4ASM56TE (repl.) | LX4ASM56TE |
Adapters for Engineering Programmers
| 6th Gen | 7th Gen |
| FXSM56TE, FSM56TE, FSM56TB, FXASM56TE, FASM56TE, FASM56T, FSM56T (obs.) | FX4SM56TE, FXSM56TE, FSM56TE, FSM56TB, FX4ASM56TE, FXASM56TE, FASM56TE, FASM56T, FSM56T (obs.), LX4ASM56TE (repl.) |
Last Updated: 05/18/2023
If the device is not yet supported by your BPM programmer (Generation), request Device Support
Note
IMPORTANT:
| Device Type: | EEPROM |
| Device Size: | 128 Mbit |
| Algorithm Programming Method: | Parallel |
Memory Organization:
| Memory Type |
Attributes(*)
|
Included in default Range (Y/N) | DUT Physical Word Address(hex)(if this area is selected/Activated) | BPWin Buffer Word Address(hex) |
| [Memory] | [R/W/E] | [Yes/No] | [000000 – 7FFFFF] | [000000 – 7FFFFF] |
| [Extra Sector] | [R/W] | [Yes/No] | [800000 – 800087] | [800000 – 800087] |
| Default Algorithm Range | — | — | [000000-7FFFFF] | [000000-7FFFFF] |
* R:Read only W: One time programmable (OTP) R/W: readable and one time programmable (OTP) R/W/E: readable and rewritable if not locked. Any configurations listed under Device-Specific’ in the menu item Device-> Settings will be written to the DUT during ‘Program’ operation regardless of memory range selection. Special Device Considerations:
| Option | Description | Default | Supported (Y/N)? |
| Protection Register 0 Bit1 | Setting this bit will lock Protection Register 0 permanently | 1 | Yes |
| Protection Registers [16-1] | Protection Registers | 65535 | Yes |
| 1. | Serialization Supported: | No |
| 2. | [Secure/Lock Erasable]: | No |
| 3. | [Special file format required]: | No |
| 4. | This device contains 17 128-bit Protection Registers PR0 through PR16 located at address range [1000000h-1000007h] in the Data Pattern. | |
| 5. | PR0[63:0] are permanently programmed by Intel with a unique number for each flash device. | |
| 6. | PR0[127:64] and PR1 through PR16 are one-time programmable (OTP) | |
| 7. | If one or more OTP registers are programmed the range must be set to exclude the registers or Erase/Program will fail. | |
| 8. | Once programmed the user-programmable register can be locked to prevent further programming using | |
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BPM does not sell programmable devices, nor do we program devices directly. BPM makes programmers and accessories to make programming in-house fast, easy, and profitable.
Additional information
| Manufacturer | Intel |
|---|---|
| Packages | TSOP(56) |
| Part Number | JS28F128P33TF70 |
| Set programming | Yes |
| Vcc(program) | 3.3 |
| Package |