Intel JS28F320J3C TSOP(56) Device
Adapters for Automated Programmers
| 6th Gen | 7th Gen | 9th Gen |
| FXASM56TD, FASM56TD, FXASM56TA, FASM56TA | FX4ASM56TD, FXASM56TD, FASM56TD, FXASM56TA, FASM56TA, WX4ASM56TD (repl.) | WX4ASM56TD |
Adapters for Manual Programmers
| 6th Gen | 7th Gen | 9th Gen |
| FXSM56TD, FSM56TD, FXSM56TA, FSM56TA, FXASM56TD, FASM56TD, FXASM56TA, FASM56TA | FX4SM56TD, FXSM56TD, FSM56TD, FXSM56TA, FSM56TA, FX4ASM56TD, FXASM56TD, FASM56TD, FXASM56TA, FASM56TA, WX4ASM56TD (repl.) | WX4ASM56TD |
Adapters for Engineering Programmers
| 6th Gen | 7th Gen |
| FXSM56TD, FSM56TD, FXSM56TA, FSM56TA, FXASM56TD, FASM56TD, FXASM56TA, FASM56TA | FX4SM56TD, FXSM56TD, FSM56TD, FXSM56TA, FSM56TA, FX4ASM56TD, FXASM56TD, FASM56TD, FXASM56TA, FASM56TA, WX4ASM56TD (repl.) |
Last Updated: 05/18/2023
If the device is not yet supported by your BPM programmer (Generation), request Device Support
Note
IMPORTANT: This device contains 128 bit Protection Register. The first 64 bits are mapped from 400000h to400007h in the buffer. These bits are pre-programmed by the manufacturer and cannot be modified.The Program’ ‘Compare’ and ‘Verify’ functions will ignore the factory-programmed area. Thelast 64 bits of the Protection Register are mapped from 400008h to 40000Fh in the buffer and areone-time-user-programmable. When Erasing this range the programmer will blank-check these bitsand will fail the erase function if the area is not blank. If ‘Auto Range Detection’ is set toYES the OTP bits of this range will not be programmed or verified. Locking the user-programmablesegment of the Protection Register is a one time only operation. ‘
BPM does not sell programmable devices, nor do we program devices directly. BPM makes programmers and accessories to make programming in-house fast, easy, and profitable.
Additional information
| Manufacturer | Intel |
|---|---|
| Packages | TSOP(56) |
| Part Number | JS28F320J3C |
| Set programming | Yes |
| Vcc(program) | 3.3 |
| Package |