Intel JS28F640J3D TSOP(56) Device

Adapters for Automated Programmers

Adapters for Manual Programmers

Adapters for Engineering Programmers

Last Updated: 05/18/2023

IMPORTANT: This device contains 128 bit Protection Register. The first 64 bits are mappedfrom 800000h to 800007h in the buffer. These bits are pre-programmed by themanufacturer and cannot be modified. The last 64 bits of theProtection Register are mapped from 800008h to 80000Fh in the buffer and areone-time-user-programmable. When erasing Protection Register and OBLAthe programmer will blank-check these bits and will fail erase if theyare not blank. Locking the user-programmable segment of theProtection Register is a one time only operation. The Erasable Block Lock-bit Array(EBLA)Block Locking Configuration Register(BLCR) and OTP Block Lock-bit Array(OBLA) can be set in Device Configure.To use the OBLA for permanent block locking bit 7 of BLCR must be set to 0otherwise OBLA will be skipped during program and may fail verify.If certain bits of BLCR are programmed to 0 the Erasable Block Lock-Bit Array(EBLA)and/or OBLA may not be programmed any more. Please referIntel Turlock Flash Memory Security Features’ on the definition and the settingcombination of BLCR bits. This algorithm will reject a part if bit 0 bit 2bit 6 or bit 7 of BLCR is not blank. It’s suggested that the BLCR value is knownto the user before programming.The default Device Range is set to [000000h-3FFFFFh].Please select ‘Entire File’ under Device Range if Protection Registers need to be included. ‘