Intel PC28F128J3F BGA(64) Device
Adapters for Automated Programmers
| 6th Gen | 7th Gen | 9th Gen |
| FXASMR64EBGF, FXASM64EBGF, FXASM64EBGE, FASMR64EBGF, FASM64EBGF, FASM64EBGE, FXASM64EBGC, FXASM64EBGA, FASM64EBGC | FX4ASMR64EBGF, FX4ASM64EBGF, FX4ASM64EBGE, FXASMR64EBGF, FXASM64EBGF, FXASM64EBGE, FASMR64EBGF, FASM64EBGF, FASM64EBGE, FXASM64EBGC, FXASM64EBGA, FASM64EBGC, WX4ASM64EBGF (repl.), LX4ASMR64EBGF (repl.), WX4ASM64EBGE (repl.) | WX4ASM64EBGF, LX4ASMR64EBGF, WX4ASM64EBGE |
Adapters for Manual Programmers
| 6th Gen | 7th Gen | 9th Gen |
| FXSMR64EBGF, FXSM64EBGF, FXSM64EBGE, FSMR64EBGF, FSM64EBGF, FSM64EBGE, FXSM64EBGC, FXSM64EBGA, FSM64EBGC, FXASMR64EBGF, FXASM64EBGF, FXASM64EBGE, FASMR64EBGF, FASM64EBGF, FASM64EBGE, FXASM64EBGC, FXASM64EBGA, FASM64EBGC | FX4SMR64EBGF, FX4SM64EBGF, FX4SM64EBGE, FXSMR64EBGF, FXSM64EBGF, FXSM64EBGE, FSMR64EBGF, FSM64EBGF, FSM64EBGE, FXSM64EBGC, FXSM64EBGA, FSM64EBGC, FX4ASMR64EBGF, FX4ASM64EBGF, FX4ASM64EBGE, FXASMR64EBGF, FXASM64EBGF, FXASM64EBGE, FASMR64EBGF, FASM64EBGF, FASM64EBGE, FXASM64EBGC, FXASM64EBGA, FASM64EBGC, WX4ASM64EBGF (repl.), LX4ASMR64EBGF (repl.), WX4ASM64EBGE (repl.) | WX4ASM64EBGF, LX4ASMR64EBGF, WX4ASM64EBGE |
Adapters for Engineering Programmers
| 6th Gen | 7th Gen |
| FXSMR64EBGF, FXSM64EBGF, FXSM64EBGE, FSMR64EBGF, FSM64EBGF, FSM64EBGE, FXSM64EBGC, FXSM64EBGA, FSM64EBGC, FXASMR64EBGF, FXASM64EBGF, FXASM64EBGE, FASMR64EBGF, FASM64EBGF, FASM64EBGE, FXASM64EBGC, FXASM64EBGA, FASM64EBGC | FX4SMR64EBGF, FX4SM64EBGF, FX4SM64EBGE, FXSMR64EBGF, FXSM64EBGF, FXSM64EBGE, FSMR64EBGF, FSM64EBGF, FSM64EBGE, FXSM64EBGC, FXSM64EBGA, FSM64EBGC, FX4ASMR64EBGF, FX4ASM64EBGF, FX4ASM64EBGE, FXASMR64EBGF, FXASM64EBGF, FXASM64EBGE, FASMR64EBGF, FASM64EBGF, FASM64EBGE, FXASM64EBGC, FXASM64EBGA, FASM64EBGC, WX4ASM64EBGF (repl.), LX4ASMR64EBGF (repl.), WX4ASM64EBGE (repl.) |
Last Updated: 05/18/2023
If the device is not yet supported by your BPM programmer (Generation), request Device Support
Note
IMPORTANT: This device contains a 128 bit Protection Register. The first 64 bits are mapped from 1000000h to 1000007h in the Data Pattern. These bits are pre-programmed by the manufacturer and cannot be modified. The last 64 bits of the Protection Register are mapped from 1000008h to 100000Fh in the Data Pattern and are one-time-user-programmable. When erasing Protection Register and OBLA the programmer will blank-check these bits and will fail erase if they are not blank. Locking the user-programmable segment of the Protection Register is a one time only operation. The Erasable Block Lock-bit Array(EBLA) Block Locking Configuration Register(BLCR) and OTP Block Lock-bit Array(OBLA) can be set under Device > Configure. To use the OBLA for permanent block locking bit 7 of BLCR must be set to 0 otherwise OBLA will be skipped during program and may fail verify. If certain bits of BLCR are programmed to 0 the Erasable Block Lock-Bit Array(EBLA) and/or OBLA may not be programmed any more. This algorithm will reject a part if bit 0 bit 2 bit 6 or bit 7 of BLCR is not blank. It’s suggested that the BLCR value is known to the user before programming. The default Device Range is set to [000000h-7FFFFFh]. Please select Entire File’ under Device > Range if Protection Registers need to be included. Password Access Feature is currently not supported. ‘
BPM does not sell programmable devices, nor do we program devices directly. BPM makes programmers and accessories to make programming in-house fast, easy, and profitable.
Additional information
| Manufacturer | Intel |
|---|---|
| Packages | BGA(64) |
| Part Number | PC28F128J3F |
| Set programming | Yes |
| Vcc(program) | 3.3 |
| Package |