Intel PF38F3050L0ZBQ0 BGA(88) Device

Adapters for Automated Programmers

Adapters for Manual Programmers

Adapters for Engineering Programmers

Last Updated: 05/18/2023

IMPORTANT: 128Mbit (8M x 16) Intel StrataFlash(R) Memory + SRAM. Device contains 17 128-bit Protection Registers PR0 through PR16 located at address range [1000000h-100010Fh] in the Data Pattern. Example: PR0[0x81-0x88] is located at [1000000h-100000Fh] PR1[0x8A-0x91] at [1000010h-100001Fh] and so on. PR0[63:0] are permanently programmed by Intel with a unique number for each flash device. PR0[127:64] and PR1 through PR16 are one-time programmable (OTP) and available for user to program. If one or more OTP registers are programmed the range must be set to exclude the registers or Erase/Program will fail. Once programmed the user-programmable register can be locked to prevent further programming using Device > Configure menu. Once the protection register is locked the entire user segment is locked and no more user bits may be programmed. The default Device Range is set to [00000h-7FFFFFh]. Please select Entire File’ under Device Range if Protection Registers needs to be included. ‘