Intel RC28F128K3C BGA(64) Device
Adapters for Automated Programmers
| 6th Gen | 7th Gen | 9th Gen |
| FXASMR64EBGI, FXASM64EBGI, FASMR64EBGI, FASM64EBGI, FXASM64EBGC, FASM64EBGC | FX4ASMR64EBGI, FX4ASM64EBGI, FXASMR64EBGI, FXASM64EBGI, FASMR64EBGI, FASM64EBGI, FXASM64EBGC, FASM64EBGC, WX4ASM64EBGI (repl.), LX4ASMR64EBGI (repl.) | WX4ASM64EBGI, LX4ASMR64EBGI |
Adapters for Manual Programmers
| 6th Gen | 7th Gen | 9th Gen |
| FXSMR64EBGI, FXSM64EBGI, FSMR64EBGI, FSM64EBGI, FXSM64EBGC, FSM64EBGC, FXASMR64EBGI, FXASM64EBGI, FASMR64EBGI, FASM64EBGI, FXASM64EBGC, FASM64EBGC | FX4SMR64EBGI, FX4SM64EBGI, FXSMR64EBGI, FXSM64EBGI, FSMR64EBGI, FSM64EBGI, FXSM64EBGC, FSM64EBGC, FX4ASMR64EBGI, FX4ASM64EBGI, FXASMR64EBGI, FXASM64EBGI, FASMR64EBGI, FASM64EBGI, FXASM64EBGC, FASM64EBGC, WX4ASM64EBGI (repl.), LX4ASMR64EBGI (repl.) | WX4ASM64EBGI, LX4ASMR64EBGI |
Adapters for Engineering Programmers
| 6th Gen | 7th Gen |
| FXSMR64EBGI, FXSM64EBGI, FSMR64EBGI, FSM64EBGI, FXSM64EBGC, FSM64EBGC, FXASMR64EBGI, FXASM64EBGI, FASMR64EBGI, FASM64EBGI, FXASM64EBGC, FASM64EBGC | FX4SMR64EBGI, FX4SM64EBGI, FXSMR64EBGI, FXSM64EBGI, FSMR64EBGI, FSM64EBGI, FXSM64EBGC, FSM64EBGC, FX4ASMR64EBGI, FX4ASM64EBGI, FXASMR64EBGI, FXASM64EBGI, FASMR64EBGI, FASM64EBGI, FXASM64EBGC, FASM64EBGC, WX4ASM64EBGI (repl.), LX4ASMR64EBGI (repl.) |
Last Updated: 05/18/2023
If the device is not yet supported by your BPM programmer (Generation), request Device Support
Note
IMPORTANT: 128Mbit (8M x 16) Intel StrataFlash(R) Memory.Default buffer value’ must be set to FFh before loading the programming data pattern.Device contains 17 128-bit Protection Registers PR0 through PR16 located at address range[1000000h-100010Fh] in the buffer. Example: PR0[0x81-0x88] is located at [1000000h-100000Fh]PR1[0x8A-0x91] at [1000010h-100001Fh] and so on.PR0[63:0] are permanently programmed by Intel with a unique number for each flash device.PR0[127:64] and PR1 through PR16 are one-time programmable (OTP) and available for the user to program.If one or more OTP registers are programmed the range must be set to exclude the registers orErase will fail.The user-programmable registers can be individually locked. Once a Protection Register lock is set the user segment of that register is locked and no more user bits of that register may be programmed.The Protection Register lock bits are OTP. ‘
BPM does not sell programmable devices, nor do we program devices directly. BPM makes programmers and accessories to make programming in-house fast, easy, and profitable.
Additional information
| Manufacturer | Intel |
|---|---|
| Packages | BGA(64) |
| Part Number | RC28F128K3C |
| Set programming | Yes |
| Vcc(program) | 3.3 |
| Package |