Intel RC28F320C3BD90(PE Cycles) BGA(64) Device

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Adapters for Engineering Programmers

Last Updated: 05/18/2023

IMPORTANT: Flash Memory with 128 bit Protection Register. Please set Default buffer value’ to FFh before loading programming data file.The first 64 bits are mapped from 400000hto 400007h in the buffer. These bits are pre-programmed by the manufacturer and cannot bemodified. They will be ignored during ‘Program’ ‘Compare’ and ‘Verify’ operations. Theother 64 bits of the Protection Register can be modified. These bits are mapped from400008h-40000Fh in the buffer. These bits are one-time-user-programmable and are OTPlockable. Locking these bits can be done under Device/Options. When Erasing this rangethe programmer will blank-check these bits and will fail the ‘Erase’ operation if the areais not blank. The ‘Erase’ operation will also fail if this area has been LOCKED.If ‘Auto Range Detection’ is set to YES the OTP bits of this range will not be programmed or verified.The default Device Range is set to [000000h-1FFFFFh].Please select ‘Entire File’ under Device Range if entire device range is required.There is a PE Cycles option in Device Configure menu.When erase is enabled this option will select number of PE cycles.The range of PE Cycle is [0-99] in Decimal.This algorithm will perform the following operation based on PE cycle:PE cycle is 0 Erase only;PE cycle is 1 Erase once + blank check once;PE cycle is 2 Erase twice + blank check once;PE cycle is 3 Erase three times + blank check once;PE cycle is 99 Erase 99 times + blank check once. ‘