International Rectifier IR38363MTRPBF LAP(26) Device

Special Device Considerations: The on-chip Multiple-Time Programmable (MPT) memory is located in at device address 20h -87h (BPWin buffer address 0h-137h). Registers 8Ah 8Bh 8Ch and 8Dh will remain at factory setting and will not be programmed or verified. There is a limit on the maximum number of reprogramming attempts. If this limit is exceeded programming operation will fail. Please refer to device specifications for details. The Compare function is disabled. Please use the Read function in lieu of Compare to verify the programmed User data. After performing a Read the User data (20h-87h) will be located in the buffer at 60h-197h. Ignore all data at register addresses(0h-1Fh 8Ah 8Bh8Ch 8Dh and 88h-FFh) found at buffer locations 00h-5Fh198h-5FFh. . The data file (TXT or CFG) requires a specific format for programming this device. This configuration file contains 134 lines of space delimited text formatted into three columns of text. Refer to IR’s Technical Brief for additional information. All comments must be deleted before loading the file. When loading the data file into the buffer please verify that BPWin indicates the format is Straight The data pattern must contain FFh after the last valid data address other wise it will fail programming and verify due to the data pattern being incorrect. The data pattern must not contain the trim data otherwise it will fail programming and verify due to the data pattern being incorrect. Read has been setup to mimic the 3-column data pattern format but will set a default mask of 0xFF. Therefore operator cannot recreate master design file from a programmed device. ‘