Micron MT25QL256ABA8E12-1AUT BGA(24) Device

Adapters for Automated Programmers

6th Gen	7th Gen
FASMC24BGV, FASMC24BGR (obs.)	FX4ASMC24BGV, FASMC24BGV, FX4ASMC24BGR (obs.), FASMC24BGR (obs.), LX4ASMC24BGV (repl.)

Adapters for Manual Programmers

6th Gen	7th Gen
FASMC24BGV, FSMC24BGR (obs.), FASMC24BGR (obs.)	FX4ASMC24BGV, FASMC24BGV, FX4SMC24BGR (obs.), FSMC24BGR (obs.), FX4ASMC24BGR (obs.), FASMC24BGR (obs.), LX4ASMC24BGV (repl.), LX4ASMC24BGR (obs.) (repl.)

Adapters for Engineering Programmers

6th Gen	7th Gen
FASMC24BGV, FSMC24BGR (obs.), FASMC24BGR (obs.)	FX4ASMC24BGV, FASMC24BGV, FX4SMC24BGR (obs.), FSMC24BGR (obs.), FX4ASMC24BGR (obs.), FASMC24BGR (obs.), LX4ASMC24BGV (repl.), LX4ASMC24BGR (obs.) (repl.)

Last Updated: 05/18/2023

If the device is not yet supported by your BPM programmer (Generation), request Device Support

Request Support Options

Note

IMPORTANT:

Device Type:	Serial SPI Flash Memory
Device Size:	256 Mbit
Algorithm Programming method:	Standard Single/Double/Quad Mode SPI

Memory Organization:

Memory Type	*Attributes^()**	Included in default Range (Y/N)	DUT Physical Byte Address(hex)(if this area is selected/Activated)	BPWin Buffer Byte Address(hex)
Main Flash Area	R/W/E	Yes	0000_0000 – 01FF_FFFFh	0000_0000 – 01FF_FFFFh
SecSi sector	R/W	N0	0000_0000 – 0000_003Fh	0200_0000 – 0200_003Fh

Default Algorithm Range	—	—	0000_0000 – 01FF_FFFFh	0000_0000 – 01FF_FFFFh

* R:Read only W:One time programmable (OTP) R/W:readable and one time programmable (OTP) R/W/E:readable and rewritable if not locked. Any configurations listed under Device-Specific’ in the menu item Device-> Settings will be written to the DUT during ‘Program’ operation regardless of memory range selection. Special Device Considerations:

256M-Bit Serial SPI Flash Memory with an additional 64-byte OTP area. This area is mapped to addresses [2000000h-200003Fh] in the data pattern. The user can lock this OTP area under Device > Configure.When OTP Data Protection Bit is set to SECURE further programming of the OTP sector is prohibited. The default Device Range is set to [0000000h-1FFFFFFh]. Please select ‘Entire File’ under Device Range if OTP area needs to be included. The user can configure the NVCR under Device > Configure. This includes enabling Quad and Dual I/O protocols.Status Register Write Disable(SRWD) bit is OTP. Once it is set device cannot be erased or reprogrammed.

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BPM does not sell programmable devices, nor do we program devices directly. BPM makes programmers and accessories to make programming in-house fast, easy, and profitable.

More Info

Additional information

8-bit Bytes	33554496
Manufacturer	Micron
Packages	BGA(24)
Part Number	MT25QL256ABA8E12-1AUT
Set programming	Yes
Vcc(program)	3.3
Package