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Micron MT29F4G08ABADAWP:D(Custom04) TSOP(48) Device

If the device is not yet supported by your BPM programmer (Generation), request Device Support

Note


IMPORTANT: This is a custom algorithm. This algorithm expects that Bad Block markers of virgin devices are at byte 512. It does not change the location of these Bad Block markers.
This is a NAND Flash Memory device with a minimum of 4016 blocks. Each block contains 256 pages which are divided into a 512Bytes main page and a 16-Byte control area. This algorithm is mapped with each page considered a contiguous (512+16) Byte page. Bad Blocks are indicated at byte 512 of the first page of a block. Bit Error Rate Tolerance is set to ‘8’ (per 4 pages of 512Bytes each) by default. This can be set for individual pages by choosing the option ‘Subpage’ under Device > NAND Options.This device uses an internal ECC that is supported under Device Config -> Settings. If enabled please deselect the ‘Include Spare Area’ box in Device Config -> NAND Options. ‘

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Additional information

8-bit Bytes

553648128

Manufacturer

Micron

Packages

TSOP(48)

Part Number

MT29F4G08ABADAWP:D

Vcc(program)

3.3

Package