Philips Semiconductors LPC2366FBD100 LQFP(100) Device
Adapters for Automated Programmers
| 6th Gen | 7th Gen | 9th Gen |
| FXASMR100LQFE, FASMR100LQFE | FX2ASMR100LQFE, FXASMR100LQFE, FASMR100LQFE | FVE4ASMR100LQFPDE |
Adapters for Manual Programmers
| 6th Gen | 7th Gen | 9th Gen |
| FXSMR100LQFE, FSMR100LQFE, FXASMR100LQFE, FASMR100LQFE | FX2SMR100LQFE, FXSMR100LQFE, FSMR100LQFE, FX2ASMR100LQFE, FXASMR100LQFE, FASMR100LQFE, LXASMR100LQFE (repl.) | FVE4ASMR100LQFPDE |
Adapters for Engineering Programmers
| 6th Gen | 7th Gen |
| FXSMR100LQFE, FSMR100LQFE, FXASMR100LQFE, FASMR100LQFE | FX2SMR100LQFE, FXSMR100LQFE, FSMR100LQFE, FX2ASMR100LQFE, FXASMR100LQFE, FASMR100LQFE, LXASMR100LQFE (repl.) |
Last Updated: 05/18/2023
If the device is not yet supported by your BPM programmer (Generation), request Device Support
Note
IMPORTANT:
| Device Type: | Microcontroller |
| Device Size: | 256KB Flash |
| Algorithm Programming method: | JTAG bootloader |
Memory Organization:
| Memory Type |
Attributes(*)
|
Included in default Range (Y/N) | DUT Physical Byte Address(hex)(if this area is selected/Activated) | BPWin Buffer Byte Address(hex) |
| Flash Memory | R/W/E | Yes | 0000_0000 – 0003_FFFF | 0000_0000 – 0003_FFFF |
| Default Algorithm Range | — | — | 0000_0000 – 0003_FFFF | 0000_0000 – 0003_FFFF |
* R:Read only W:One time programmable (OTP) R/W:readable and one time programmable (OTP) R/W/E:readable and rewritable if not locked. Any configurations listed under Device-Specific’ in the menu item Device-> Settings will be written to the DUT during ‘Program’ operation depending on memory range selection. Special Device Considerations:
| 1. | Device Configure option ‘Auto-run code in Flash after reset’ can be set to change buffer location 14h to contain the 2’s complement of the check-sum of the remaining interrupt vectors.
| 2. |
Code read protection available under Device Configure is enabled by programming the flash address location 1FCh (User flash sector 0). It works in conjunction with the following values:
| 3. |
CRP1 is enabled if value 12345678h(305419896 Decimal) is programmed. Access to chip via the JTAG pins is disabled.
| 4. |
CRP2 is enabled if value 87654321h(2271560481 Decimal) is programmed. Access to chip via JTAG pins is disabled. The following ISP commands are also disabled:Read MemoryWrite to RAM Go Copy RAM to flash and Compare. ISP erase command only allows erasure of all user sectors.
| 5. |
CRP3 is enabled if value 43218765h(1126270821 Decimal) is programmed. Access to chip via the JTAG pinsis disabled. ISP entry by pulling P2.10 LOW is disabled if a valid user code is present in flash sector 0.When this mode is invoked no future factory testing can be performed on the device.
| 6. |
Once CRP1/CRP2/CRP3 is programmed Erase Program Verify and all standalone operations are expected to fail as JTAG communication is disabled. |
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BPM does not sell programmable devices, nor do we program devices directly. BPM makes programmers and accessories to make programming in-house fast, easy, and profitable.
Additional information
| 8-bit Bytes | 262144 |
|---|---|
| Manufacturer | Philips Semiconductors |
| Packages | QFP(100) |
| Part Number | LPC2366FBD100 |
| Vcc(program) | 3.3 |
| Package |