Philips Semiconductors P89C51RC2 QFP(44) Device
Adapters for Automated Programmers
| 6th Gen | 7th Gen |
| FASM44TQE, FASM44TQF, FASM44TQY, FASM44TQ, FASM44TQN, FASM44TQS, FASM44TQD, FASM44TQA | FASM44TQE, FASM44TQF, FASM44TQY, FASM44TQ, FASM44TQN, FASM44TQS, FASM44TQD, FASM44TQA |
Adapters for Manual Programmers
| 6th Gen | 7th Gen |
| FSM44TQE, FSM44TQF, FSM44TQY, FSM44TQN, FSM44TQ, FSM44QI, FSM44QC, FSM44TQS, FSM44TQD, FSM44TQA, FASM44TQE, FASM44TQF, FASM44TQY, FASM44TQ, FASM44TQN, FASM44TQS, FASM44TQD, FASM44TQA | FSM44TQE, FSM44TQF, FSM44TQY, FSM44TQN, FSM44TQ, FSM44QI, FSM44QC, FSM44TQS, FSM44TQD, FSM44TQA, FASM44TQE, FASM44TQF, FASM44TQY, FASM44TQ, FASM44TQN, FASM44TQS, FASM44TQD, FASM44TQA, FSM44TQE, FSM44TQF, FSM44TQY, FSM44TQN, FSM44TQ, FSM44TQS, FSM44QI, FSM44QC, FSM44TQD, FSM44TQA, FASM44TQE, FASM44TQF, FASM44TQY, FASM44TQ, FASM44TQN, FASM44TQS, FASM44TQD, FASM44TQA |
Adapters for Engineering Programmers
| 6th Gen | 7th Gen |
| FSM44TQE, FSM44TQF, FSM44TQY, FSM44TQN, FSM44TQ, FSM44QI, FSM44QC, FSM44TQS, FSM44TQD, FSM44TQA, FASM44TQE, FASM44TQF, FASM44TQY, FASM44TQ, FASM44TQN, FASM44TQS, FASM44TQD, FASM44TQA | FSM44TQE, FSM44TQF, FSM44TQY, FSM44TQN, FSM44TQ, FSM44QI, FSM44QC, FSM44TQS, FSM44TQD, FSM44TQA, FASM44TQE, FASM44TQF, FASM44TQY, FASM44TQ, FASM44TQN, FASM44TQS, FASM44TQD, FASM44TQA |
Last Updated: 05/18/2023
If the device is not yet supported by your BPM programmer (Generation), request Device Support
Note
IMPORTANT: This algorithm works for 2nd Generation P89C51RC2. For 1st generation P89C51RC2please select P89C51RC2 with H’ at the end of the device name.Microcontroller with flash.There are three security options.Please consult Philips specs for info about Lock Bits.Erasing the device is the only way to reset the Lock Bits.Default value for Boot Vector byte is FCh.Default value for Status byte is 00h.Use Device Configure menu to adjust these values.The Data Block is mapped to buffer locations 8001h-8FFFh.Please note that location 8000h in the buffer will not reflect state of special cells in device.If the Clock Configuration Bit under Device Configure is set to PROGRAMMED it will overridethe SFR clock mode bit (X2) in the CKCON register and the device can only be operated in 6-clockmode. If it is set to ERASED the SFR bit (X2) may be used to select between 6-clock and 12-clock mode.*****************DEBUG******************The issue came up as to why this Generation of the device and 1st Gen had differingmax_addr’s. The reason is that the 1st Gen devices did not have a Data Block area on the devicebut these 2nd Gen devices do. ‘
BPM does not sell programmable devices, nor do we program devices directly. BPM makes programmers and accessories to make programming in-house fast, easy, and profitable.
Additional information
| 8-bit Bytes | 36864 |
|---|---|
| Manufacturer | Philips Semiconductors |
| Packages | DIP(40) PLCC(44) QFP(44) |
| Part Number | P89C51RC2 |
| Set programming | Yes |
| Vcc(program) | 5 |
| Package |