Adapters for Automated Programmers
6th Gen | 7th Gen | 9th Gen |
FASMR20SSYA | FX4ASMR20SSYA, FASMR20SSYA, LX4ASMR20SSYA (repl.) | LX4ASMR20SSYA |
Adapters for Manual Programmers
6th Gen | 7th Gen | 9th Gen |
FSMR20SSYA, FASMR20SSYA | FX4SMR20SSYA, FSMR20SSYA, FX4ASMR20SSYA, FASMR20SSYA, LX4ASMR20SSYA (repl.) | LX4ASMR20SSYA |
Adapters for Engineering Programmers
6th Gen | 7th Gen |
FSMR20SSYA, FASMR20SSYA | FX4SMR20SSYA, FSMR20SSYA, FX4ASMR20SSYA, FASMR20SSYA, LX4ASMR20SSYA (repl.) |
Last Updated: 05/18/2023
If the device is not yet supported by your BPM programmer (Generation), request Device Support
Note
IMPORTANT: This custom algorithm is for debugging purposes not for general use. Two-wire UART Mode. Code Flash is mapped to Data Pattern address 00000h – 00FFFh. Data Flash is mapped to Data Pattern address F1000h – F17FFh. Boot cluster 0 is located in Code Flash address 00000h – 00FFFh. The Security Byte can be set under Device->Configure and programmed with Secure command. Security for this device cannot be verified. Security Byte: Set Bit 1 to 0 will disable Boot cluster rewrite. Set Bit 2 to 0 will disable Block Erase. Set Bit 4 to 0 will disable Program. Bits 0 3 5 6 and 7 are reserved and should be set to 1s. Bit 4 can be erased through Erase. Once bit 2 is programmed to 0 the whole chip is secured and no further operations can be performed. Once Bit 1 is programmed to 0 the boot block clusters specified are secured and no further operations can be performed. This algorithm supports Firmware version V3.03 and below. ‘
BPM does not sell programmable devices, nor do we program devices directly. BPM makes programmers and accessories to make programming in-house fast, easy, and profitable.
Additional information
8-bit Bytes | 989184 |
---|---|
Manufacturer | Renesas |
Packages | TSOP(20) |
Part Number | R5F10267ASP#X0 |
Set programming | Yes |
Vcc(program) | 3.3 |
Package |