Renesas R5F211B1DSP SOIC(20) Device

Adapters for Automated Programmers

Adapters for Manual Programmers

Adapters for Engineering Programmers

Last Updated: 05/18/2023

IMPORTANT: R8C/1B Microcomputer Flash Memory Version.This algorithm is written in parallel I/O mode. In the buffer8K-byte Boot ROM is mapped to 0000h-1FFFh.2K-byte Data ROM (block A & B) is mapped to 2400h-2BFFh4K-byte User ROM is mapped to F000h-FFFFh.The User Boot and Data ROMs are selected in the Configure Options.Buffer locations 2000h-23FFh and 2C00h-EFFFh are not used and should be filled with FFh.Buffer locations FFDCh-FFFFh are special. The last byte of User ROM (address FFFFh)containing code protection bits can be set in Device Configure menu. Secure command must be enabled to program this device.Config Options allow the individual ROM sections to be selected for device operations. Before executingany command at least 1 Operations Area must be selected.The Boot ROM area of the device has a standard serial I/O modecontrol program stored in it when shipped from the factory.It is not necessary to program the boot area for normal use the device may failcommunication if improper data is programmed into the Boot ROM area.