Renesas R5F21238DFP#U0 QFP(48) Device
Adapters for Automated Programmers
| 6th Gen | 7th Gen | 9th Gen |
| FASMR48LQFC | FX4ASMR48LQFC, FASMR48LQFC, WX4ASMR48LQFC (repl.) | WX4ASMR48LQFC |
Adapters for Manual Programmers
| 6th Gen | 7th Gen | 9th Gen |
| FSMR48LQFC, FASMR48LQFC | FX4SMR48LQFC, FSMR48LQFC, FX4ASMR48LQFC, FASMR48LQFC, WX4ASMR48LQFC (repl.) | WX4ASMR48LQFC |
Adapters for Engineering Programmers
| 6th Gen | 7th Gen |
| FSMR48LQFC, FASMR48LQFC | FX4SMR48LQFC, FSMR48LQFC, FX4ASMR48LQFC, FASMR48LQFC, WX4ASMR48LQFC (repl.) |
Last Updated: 05/18/2023
If the device is not yet supported by your BPM programmer (Generation), request Device Support
Note
IMPORTANT:
| Device Type: | R8C CPU core |
| Device Size: | 8K byte boot code + 2K byte Data ROM +64K Bytes User ROM |
| Algorithm Programming Method: | R8C/22 Parallel Writer Mode. |
Memory Organization:
| Memory Type |
Attributes(*)
|
Included in default Range (Y/N) | DUT Physical Byte Address(hex)(if this area is selected/Activated) | BPWin Buffer Byte Address(hex) |
| Boot ROM | R/W/E | No | 0000_0000 – 0000_1FFF | 0000_0000 – 0000_1FFF |
| Data ROM | R/W/E | Yes | 0000_2400 – 0000_2BFF | 0000_2400 – 0000_2BFF |
| User ROM | R/W/E | Yes | 0000_4000 – 0001_3FFF | 0000_4000 – 0001_3FFF |
| Default Algorithm Range | — | — | 0000_2400 – 0001_3FFF | 0000_2400 – 0001_3FFF |
* R:Read only W: One time programmable (OTP) R/W: readable and one time programmable (OTP) R/W/E: readable and rewritable if not locked. The User Data and Boot ROMs are selected under Device-Specific’ in the menu item Device-> Settings. Address FFFFh (OFS Register) in the User ROM will be written to the DUT during ‘Secure’ operation. Special Device Considerations:
| Bit Number | Bit Name | Description
| Bit 0
| WDTON
| Watchdog Timer (1: Enabled by default)
| Bit 2
| ROMCR
| ROM code protect disabled bit (1: ROMCP1 enabled by default)
| Bit 3 (1)
| ROMCP1
| ROM code protect bit (1: ROM code protect disabled by default)
| Bit 6
| LVD1ON
| Voltage detection circuit start bit (1: Voltage monitor reset disabled)
| Bit 7
| CSPROINI
| Count source protect mode (1: Count source protect mode disabled)
| Bits 1 4 & 5
| Reserved
| Set to 1 | |
|---|
(1)The OFS Register (Address FFFFh) contains code protection bits. If secured standalone operations will fail.
BPM does not sell programmable devices, nor do we program devices directly. BPM makes programmers and accessories to make programming in-house fast, easy, and profitable.
Additional information
| 8-bit Bytes | 81920 |
|---|---|
| Manufacturer | Renesas |
| Packages | QFP(48) |
| Part Number | R5F21238DFP#U0 |
| Set programming | Yes |
| Vcc(program) | 5 |
| Package |