Renesas R7FS3A6783A01CFL QFP(48) Device
Adapters for Automated Programmers
| 9th Gen |
| LX4ASMR48QFPT |
Adapters for Manual Programmers
| 9th Gen |
| LX4ASMR48QFPT |
Adapters for Engineering Programmers
Last Updated: 05/18/2023
If the device is not yet supported by your BPM programmer (Generation), request Device Support
Note
IMPORTANT:
| Device Type: | Renesas Synergy Platform |
| Device Size: | 256 KB Code Flash + 4kB Data Flash |
| Algorithm Programming Method: | Device Boot Firmware w/ Two-wire UART |
Memory Organization:
| Memory Type |
Attributes(*)
|
Included in default Range (Y/N) | DUT Physical Byte Address(hex)(if this area is selected/Activated) | BPWin Buffer Byte Address(hex) |
| Code Flash | R/W/E | Yes | 0000_0000 – 0003_FFFF | 0000_0000 – 0003_FFFF |
| Access Window Setting Control Register (AWSC) | See Notes Below | No | 0101_0008 – 0101_000B | 0101_0008 – 0101_000B |
| Access Window Setting Register (AWS) | See Notes Below | No | 0101_0010 – 0101_0013 | 0101_0010 – 0101_0013 |
| OCD/Serial Programmer ID Setting Register (OSIS) Unit 1 | See Notes Below | No | 0101_0018 – 0101_001B | 0101_0018 – 0101_001B |
| OCD/Serial Programmer ID Setting Register (OSIS) Unit 2 | See Notes Below | No | 0101_0020 – 0101_0023 | 0101_0020 – 0101_0023 |
| OCD/Serial Programmer ID Setting Register (OSIS) Unit 3 | See Notes Below | No | 0101_0028 – 0101_002B | 0101_0028 – 0101_002B |
| OCD/Serial Programmer ID Setting Register (OSIS) Unit 4 | See Notes Below | No | 0101_0030 – 0101_0033 | 0101_0030 – 0101_0033 |
| Data Flash | R/W/E | No | 4010_0000 – 4010_0FFF | 4010_0000 – 4010_0FFF |
| Default Algorithm Range | — | — | 0000_0000 – 0003_FFFF | 0000_0000 – 0003_FFFF |
* R:Read only W: One time programmable (OTP) R/W: readable and one time programmable (OTP) R/W/E: readable and rewritable if not locked. Any configurations listed under Device-Specific’ in the menu item Device-> Settings will be written to the DUT during ‘Program’ operation regardless of memory range selection. Special Device Considerations:
| 1. | Option Function Select Register is located in Code Flash address 0400h – 043Bh. | |
| Programming the Option Function Select Register may disable access via this algorithm . | ||
| 2. | Data Flash memory range requires a full image with no blank areas. | |
Option Setting Memory Notes:
| Option Setting Memory includes the AWS AWSC and OSIS registers. | ||
| Serialization is NOT supported in these regions. | ||
| Access Window Setting Control Register (AWSC): | ||
| Bit 8 is BTFLG. | ||
| Bit 14 is FSPR. If this bit is ever set to a 0 it can’t be set back to a 1. | ||
| Rest of this register is reserved. See datasheet for more details. | ||
| Access Window Setting Register (AWS): | ||
| Bits 0 to 11: Access Window Start Block Address (FAWS) | ||
| Bits 16 to 27:Access Window End Block Address (FAWE) | ||
| The rest of this register is reserved. | ||
| Please refer to Option Setting Memory in User’s Manual for details. | ||
| Erase and program will fail if the device range is not set to be within the access window. | ||
| If this register has a non-default value please erase this register first before erasing the rest of the device. | ||
| OCD/Serial Programmer ID Setting Register (OSIS): | ||
| This register stores the ID for ID code protection of the OCD/serial programmer. | ||
| The OSIS register must be set in 32-bit units. There are 4 units total. | ||
| Changing this register to a non default value will lock the device. Standalone operaitons will fail as a result. | ||
| Please see the datasheet for more details. | ||
‘
BPM does not sell programmable devices, nor do we program devices directly. BPM makes programmers and accessories to make programming in-house fast, easy, and profitable.
Additional information
| 8-bit Bytes | 1074794496 |
|---|---|
| Manufacturer | Renesas |
| Packages | QFP(48) |
| Part Number | R7FS3A6783A01CFL |
| Set programming | Yes |
| Vcc(program) | 3.3 |
| Package |