Spansion S25FL127SABMFI100 SOIC(8) Device
Adapters for Automated Programmers
| 8th Gen | 9th Gen | Flashstream |
| FVE4ASMH08SA, FVE4ASMR08SHLA, FVE4ASM08SHLA, FVE4ASMR08SHA (obs.), FVE4ASM08SHA (obs.), FVE4ASMR08SHLA, FVE4ASM08SHA (obs.), FVE4ASM08SHLA, FVE4ASMH08SA, FVE4ASMR08SHA (obs.) | FVE4ASMR08SHLA, FVE4ASM08SHA (obs.), FVE4ASM08SHLA, FVE4ASMH08SA, FVE4ASMR08SHA (obs.) | FVE4ASMH08SA, FVE4ASMR08SHLA, FVE4ASM08SHLA, FVE4ASMR08SHA (obs.), FVE4ASM08SHA (obs.), FVE4ASMR08SHLA, FVE4ASM08SHA (obs.), FVE4ASM08SHLA, FVE4ASMH08SA, FVE4ASMR08SHA (obs.) |
Adapters for Manual Programmers
| 8th Gen | 9th Gen | Flashstream |
| FVE4ASMH08SA, FVE4ASMR08SHLA, FVE4ASM08SHLA, FVE4ASMR08SHA (obs.), FVE4ASM08SHA (obs.), FVE4ASMR08SHLA, FVE4ASM08SHA (obs.), FVE4ASM08SHLA, FVE4ASMH08SA, FVE4ASMR08SHA (obs.) | FVE4ASMR08SHLA, FVE4ASM08SHA (obs.), FVE4ASM08SHLA, FVE4ASMH08SA, FVE4ASMR08SHA (obs.) | FVE4ASMH08SA, FVE4ASMR08SHLA, FVE4ASM08SHLA, FVE4ASMR08SHA (obs.), FVE4ASM08SHA (obs.), FVE4ASMR08SHLA, FVE4ASM08SHA (obs.), FVE4ASM08SHLA, FVE4ASMH08SA, FVE4ASMR08SHA (obs.) |
Adapters for Engineering Programmers
Last Updated: 05/18/2023
If the device is not yet supported by your BPM programmer (Generation), request Device Support
Note
IMPORTANT:
| Device Type: | SPI Serial Flash Memory |
| Device Size: | 128M-bit |
| Algorithm Programming Method: | SPI |
Memory Organization:
| Memory Type |
Attributes(*)
|
Included in default Range (Y/N) | DUT Physical Byte Address(hex)(if this area is selected/Activated) | BPWin Buffer Byte Address(hex) |
| Main Flash Area | R/W/E | Yes | 0000_0000 – 00FF_FFFF | 0000_0000 – 00FF_FFFF |
| OTP | R/W | No | 0100_0010 – 0100_03FF | 0100_0010 – 0100_03FF | Password | R/W | No | 0100_0400 – 0100_0407 | 0100_0400 – 0100_0407 |
| Default Algorithm Range | — | — | 0000_0000 – 00FF_FFFF | 0000_0000 – 00FF_FFFF |
* R/W: readable and one time programmable (OTP) R/W/E: readable and rewritable if not locked. Any configurations listed under Device-Specific’ in the menu item Device->Settings will be written to the DUT during ‘Program’ operation regardless of memory range selection. Special Device Considerations:
| 1. | Serialization Supported: | Yes | ||||||||||||||||||||||||
| 2. | Erase must be selected if device to be programmed already has QE bit enabled.
| 3. |
The device has 256 equal sectors with 64K byte each.
| 4. |
The TBPARM OTP bit will be programmed first. You may not mix a top boot device with a bottom boot device.
| 5. |
The Factory Programmed 128-bit random number located at the beginning of the OTP regioncannot be programmed. The data in this region will not be shown in the Buffer Editor. |
6. |
OTP Lock bits are located in Buffer Addresses [0100_0010h – 0100_0013h].
| 7. |
OTP Reserved bits are located in Buffer Addresses [0100_0014h – 0100_001Fh]. |
8. |
The correct password value located in Buffer Addresses [0100_0400h – 0100_0407h] may only be readbefore the Password Protection Mode bit in the ASP Register (ASP[2])has been programmed to ‘0’. |
9. |
The Persistent Protection Bits (PPB) may be programmed under Device Config > Configure.Each Group is divided into 64K-Bytes of data. |
10. |
The status register bits can be set under Device Config > Configure. | | |||||||||
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BPM does not sell programmable devices, nor do we program devices directly. BPM makes programmers and accessories to make programming in-house fast, easy, and profitable.
Additional information
| 8-bit Bytes | 16778248 |
|---|---|
| Manufacturer | Spansion |
| Packages | SOIC(8) |
| Part Number | S25FL127SABMFI100 |
| Set programming | Yes |
| Vcc(program) | 3.6 |
| Package |