Spansion S25FL129P0XMFI00(Custom01) SOIC(16) Device
Adapters for Automated Programmers
| 6th Gen | 7th Gen | 9th Gen |
| FASM16SE, FASM16SB, FASM16S, FASM28S, FASM28SB, FASM28SH, FASM28SE, FASM24SSA, FASM20S, FASM20SE, FASM20SB, FASM18S | FASM16SE, FASM16SB, FASM16S, FASM28S, FASM28SB, FASM28SH, FASM28SE, FASM24SSA, FASM20S, FASM20SE, FASM20SB, FASM18S | WX4ASM16SE |
Adapters for Manual Programmers
| 6th Gen | 7th Gen | 9th Gen |
| FSM16SE, FSM16SB, FSM28SB, FSM28SH, FSM28SE, FSM24SSA, FSM20S, FSM20SE, FSM20SB, FSM18S, FASM16SE, FASM16SB, FASM16S, FASM28S, FASM28SB, FASM28SH, FASM28SE, FASM24SSA, FASM20S, FASM20SE, FASM20SB, FASM18S, FSM30S (obs.) | FSM16SE, FSM16SB, FSM28SB, FSM28SH, FSM28SE, FSM24SSA, FSM20S, FSM20SE, FSM20SB, FSM18S, FASM16SE, FASM16SB, FASM16S, FASM28S, FASM28SB, FASM28SH, FASM28SE, FASM24SSA, FASM20S, FASM20SE, FASM20SB, FASM18S, FSM30S (obs.), FSM16SE, FSM16SB, FSM28SE, FSM28SB, FSM28SH, FSM24SSA, FSM20S, FSM20SE, FSM20SB, FSM18S, FASM16SE, FASM16SB, FASM16S, FASM28S, FASM28SE, FASM28SB, FASM28SH, FASM24SSA, FASM20S, FASM20SE, FASM20SB, FASM18S, FSM30S (obs.) | WX4ASM16SE |
Adapters for Engineering Programmers
| 6th Gen | 7th Gen |
| FSM16SE, FSM16SB, FSM28SB, FSM28SH, FSM28SE, FSM24SSA, FSM20S, FSM20SE, FSM20SB, FSM18S, FASM16SE, FASM16SB, FASM16S, FASM28S, FASM28SB, FASM28SH, FASM28SE, FASM24SSA, FASM20S, FASM20SE, FASM20SB, FASM18S, FSM30S (obs.) | FSM16SE, FSM16SB, FSM28SB, FSM28SH, FSM28SE, FSM24SSA, FSM20S, FSM20SE, FSM20SB, FSM18S, FASM16SE, FASM16SB, FASM16S, FASM28S, FASM28SB, FASM28SH, FASM28SE, FASM24SSA, FASM20S, FASM20SE, FASM20SB, FASM18S, FSM30S (obs.) |
Last Updated: 05/18/2023
If the device is not yet supported by your BPM programmer (Generation), request Device Support
Note
IMPORTANT: This is a custom algorithm. Single I/O Mode is re-enabled for failed devices in Program and Verify operation. 128M-BIT CMOS SERIAL Flash MEMORY. This algorithm uses Quad I/O High Performance Read and Quad Page Program mode to Program and Verify/Read/Compare the device. The device has 64 equal sectors with 64K byte each. This device contains thirty 16-byte and one 10-byte OTP regions that can be individually locked. The OTP regions are located at address range [1000000h-10001E9h] in the Data Pattern. Device OTP regions memory address range 114h-213h is mapped at [1000000h-10000FFh] in the Data Pattern. Device OTP regions memory address range 216h-2FFh is mapped at [1000100h-10001E9h] in the Data Pattern. OTP regions can be permanently locked by setting OTP Memory Region Lock Byte under Device > Configure. Once BPNV bit under Device > Configure is set BP0 BP1 and BP2 will become volatile and are not read anymore. ‘
BPM does not sell programmable devices, nor do we program devices directly. BPM makes programmers and accessories to make programming in-house fast, easy, and profitable.
Additional information
| 8-bit Bytes | 16777706 |
|---|---|
| Manufacturer | Spansion |
| Packages | SOIC(16) |
| Part Number | S25FL129P0XMFI00 |
| Set programming | Yes |
| Vcc(program) | 3.3 |
| Package |