STMicroelectronics M48T86PC DIP(24) Device

Adapters for Automated Programmers

6th Gen	7th Gen
FASM48D300, FASM48D600	FASM48D300, FASM48D600

Adapters for Manual Programmers

6th Gen	7th Gen	9th Gen
FSM32DG, FSM48D, FSM48DH, FSM48DC, FSM48DF, FSM48DL, FSM48DE, FASM48D300, FASM48D600, FSM48DB (obs.), LX4SM32DG (repl.)	FSM32DG, FSM48D, FSM48DH, FSM48DC, FSM48DF, FSM48DL, FSM48DE, FASM48D300, FASM48D600, FSM48DB (obs.), LX4SM32DG (repl.), FSM32DG, FSM48D, FSM48DH, FSM48DF, FSM48DC, FSM48DL, FSM48DE, FASM48D300, FASM48D600, FSM48DB (obs.), LX4SM32DG (repl.)	LX4SM32DG

Adapters for Engineering Programmers

6th Gen	7th Gen
FSM32DG, FSM48D, FSM48DH, FSM48DC, FSM48DF, FSM48DL, FSM48DE, FASM48D300, FASM48D600, FSM48DB (obs.), LX4SM32DG (repl.)	FSM32DG, FSM48D, FSM48DH, FSM48DC, FSM48DF, FSM48DL, FSM48DE, FASM48D300, FASM48D600, FSM48DB (obs.), LX4SM32DG (repl.)

Last Updated: 05/18/2023

If the device is not yet supported by your BPM programmer (Generation), request Device Support

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Note

IMPORTANT: Real Time Clock.The first 14 bytes contain the RTC time calendar alarm data andfour registers. Please see the device specification on how to set datafor these 14 bytes. All 128 bytes can be directly written except forthe following read-only memory: Registers C and D Bit 7 of Register Aand the high order bit of the seconds byte (clock data).In this algorithm verify and compare are skipped for the first 14 addresses.The reason for this is that the clock circuit may be running after the partis programmed. For example if registers A and B (address 1011) are programmedwith 20h and 00h respectivelyyou will see the clock running by executing Read Compare or Sum command.

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BPM does not sell programmable devices, nor do we program devices directly. BPM makes programmers and accessories to make programming in-house fast, easy, and profitable.

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Additional information

8-bit Bytes	128
Manufacturer	STMicroelectronics
Packages	DIP(24)
Part Number	M48T86PC
Set programming	Yes
Vcc(program)	5
Package