STMicroelectronics STM32L4Q5VGT3 LQFP(100) Device

Adapters for Automated Programmers

8th Gen	9th Gen
FVE4ASMR100LQFPH, FVE4ASMR100LQFPH	FVE4ASMR100LQFPH

Adapters for Manual Programmers

8th Gen	9th Gen
FVE4ASMR100LQFPH, FVE4ASMR100LQFPH	FVE4ASMR100LQFPH

Adapters for Engineering Programmers

Last Updated: 05/18/2023

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Note

IMPORTANT: ARM-based 32-bit MCU with Flash

Device Type:	ARM Cortex-M4 32-bit MCU
Device Memory Type:	1M-Byte Flash + 1024-Byte OTP Area
Algorithm Programming Method:	SWD protocol

Memory Organization:

*Memory Type*	Attributes*	*Included in DefaultRange (Y/N)*	*DUT Physical ByteAddress(hex)*	*BPWin Buffer ByteAddress(hex)*
Flash Memory	R/W/E	Yes	0800_0000 – 080F_FFFF	0800_0000 – 080F_FFFF
OTP Area	R/W	No	1FFF_7000 – 1FFF_73FF	1FFF_7000 – 1FFF_73FF

Default Algorithm Range	—	—	0800_0000 – 080F_FFFF	0800_0000 – 080F_FFFF

* R:Read only W: One time programmable (OTP) R/W: readable and one time programmable (OTP) R/W/E: readable and rewritable if not locked. Option Byte Mapping: RDP USER and nWRPi bits can be changed under Device Config->Settings.

Data Pattern Address	Bits [63:32]	Bits [31:16]	Bits [15:0]
1FF00000h	Complement to bits [31:0]	USER OPT[31:16]	USER_OPT[15:8] RDP[7:0]
1FF00008h	Complement to bits[31:0]	Unused[31:16]	PCROP1_STRT[15:0]
1FF00010h	Complement to bits [31:0]	PCROP_RDP[31] Unused[30:16]	PCROP1_END[15:0]
1FF00018h	Complement to bits [31:0]	Unused[31:24] WRP1A_END[23:16]	Unused[15:8] WRP1A_STRT[7:0]
1FF00020h	Complement to bits [31:0]	Unused[31:24] WRP1B_END[23:16]	Unused[15:8] WRP1B_STRT[7:0]
1FF01008h	Complement to bits[31:0]	Unused[31:16]	PCROP2_STRT[15:0]
1FF01010h	Complement to bits [31:0]	PCROP_RDP[31] Unused[30:16]	PCROP2_END[15:0]
1FF01018h	Complement to bits [31:0]	Unused[31:24] WRP2A_END[23:16]	Unused[15:8] WRP2A_STRT[7:0]
1FF01020h	Complement to bits [31:0]	Unused[31:24] WRP2B_END[23:16]	Unused[15:8] WRP2B_STRT[7:0]

Special Device Considerations:

1.	Only non-reserved Option Byte bits will be checked and read.
2.	The Option Bytes are not verified after the Program operation when the RDP bits are set to Read Protection Level 1 or Level 2.
3.	The Erase operation will erase the entire Flash Memory including the Option Bytes. Erase will also set the device back to Read Protection Level 0 as long as the RDP bits were not programmed to Read Protection Level 2.
4.	If RDP protection is set to Level 1 (Non-AAh Non-CCh) the main Flash Memory will be totally inaccessible until erase is executed.
5.	If RDP protection is set to Level 2 (CCh) device’s debug interface will be disabled. Any subsequent operation on the device will fail.

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More Info

Additional information

8-bit Bytes	536836132
Manufacturer	STMicroelectronics
Packages	LQFP(100)
Part Number	STM32L4Q5VGT3
Set programming	Yes
Vcc(program)	3
Package