SUMMIT Microelectronics SMM665F-144 QFP(48) Device
Adapters for Automated Programmers
| 6th Gen | 7th Gen |
| FASM48TQN, FASM48TQF, FASM48TQNA, FASM48TQ, FASM48TQA | FASM48TQN, FASM48TQF, FASM48TQNA, FASM48TQ, FASM48TQA |
Adapters for Manual Programmers
| 6th Gen | 7th Gen |
| FSM48TQN, FASM48TQN, FSM48TQF, FSM48TQNA, FSM48TQ, FSM48TQA, FASM48TQF, FASM48TQNA, FASM48TQ, FASM48TQA | FSM48TQN, FASM48TQN, FSM48TQF, FSM48TQNA, FSM48TQ, FSM48TQA, FASM48TQF, FASM48TQNA, FASM48TQ, FASM48TQA |
Adapters for Engineering Programmers
| 6th Gen | 7th Gen |
| FSM48TQN, FASM48TQN, FSM48TQF, FSM48TQNA, FSM48TQ, FSM48TQA, FASM48TQF, FASM48TQNA, FASM48TQ, FASM48TQA | FSM48TQN, FASM48TQN, FSM48TQF, FSM48TQNA, FSM48TQ, FSM48TQA, FASM48TQF, FASM48TQNA, FASM48TQ, FASM48TQA |
Last Updated: 05/18/2023
If the device is not yet supported by your BPM programmer (Generation), request Device Support
Note
IMPORTANT: Six-Channel Active DC Output Controller Monitor Marginer and Sequencer.In the Buffer addresses [00h-EFh] are for the Configuration Registersat slave address 1010/1011 [F0h-2EFh] are for 2KByte General-Purpose Memory.The Configuration Registers R83 and R84 at slave address 1001 can beset in Device Configure. Bit 7 of Configuration Register R0D at Buffer address 0Dhis lock bit to disable writing Configuration Registers. Read the device to checkthe status of this bit. If it is 1′ only General-Purpose Memory is programmable.This algorithm will not program this bit from 0 to 1.All unused Registers and unused bits of Registers must be set 0. Please seedevice specification for the unused Registers. ‘
BPM does not sell programmable devices, nor do we program devices directly. BPM makes programmers and accessories to make programming in-house fast, easy, and profitable.
Additional information
| 8-bit Bytes | 752 |
|---|---|
| Manufacturer | SUMMIT Microelectronics |
| Packages | QFP(48) |
| Part Number | SMM665F-144 |
| Vcc(program) | 5 |
| Package |