Texas Instruments CC1312R1F3RGZR QFN(48) Device

Adapters for Automated Programmers

7th Gen	9th Gen
FX4ASMR48QFNA, FASMR48QFNA, LX4ASMR48QFNA (repl.)	LX4ASMR48QFNA

Adapters for Manual Programmers

7th Gen	9th Gen
FX4ASMR48QFNA, FASMR48QFNA, LX4ASMR48QFNA (repl.)	LX4ASMR48QFNA

Adapters for Engineering Programmers

7th Gen

FX4ASMR48QFNA, FASMR48QFNA, LX4ASMR48QFNA (repl.)

Last Updated: 05/18/2023

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Note

IMPORTANT: Microcontroller with 352K bytes flash memory.Flash Memory is mapped to the range [00000h-57FFFh] in the bufferFlash programming verified via CRC32 checksum calculation.The 32-bit CCFG registers are located at [57FD8h-57FFFh].These registers are mapped to the same addresses in the buffer.Default non-0xFF CCFG Erase values are listed in the table below.

CCFG Register	Data Buffer Address	Erase Value
BL_CONFIG ⁽¹⁾	0x57FD8	0xC5FFFFFF
CCFG_TI_OPTIONS ⁽²⁾	0x57FE0	0xFFFFFFC5
CCFG_TAP_DAP_0 ⁽³⁾	0x57FE4	0xFFC5C5C5
CCFG_TAP_DAP_1 ⁽³⁾	0x57FE8	0xFFC5C5C5

Notes:1. BOOTLOADER ENABLE in BL_CONFIG configures the functionality of the ROM boot loader. a. To program BL_CONFIG memory location enable ‘SECURE’. b. To disable the bootloader please program 0x00 into BOOTLOADER_ENABLE. You must erase the device before any other operation will work. c. To enable the bootloader please program 0xC5 into BOOTLOADER_ENABLE. This is also the default value. d. Attempting to program values other than 0x00 and 0xC5 into BOOTLOADER_ENABLE may result in undefined behavior. e. BL_CONFIG register is not verified by this algorithm.2. CCFG_TI_OPTIONS configures TI option for failure analysis.3. CCFG_TAP_DAP_x enables/disables TAP/DAP access during power up.4. Setting IMAGE_VALID_CONF to zero will disable the bootloader. You must erase the device before other operations will work.CCFG bits can only be changed from 1 to a 0′.Serialization is not currently supported. ‘

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More Info

Additional information

8-bit Bytes	360448
Manufacturer	Texas Instruments
Packages	QFN(48)
Part Number	CC1312R1F3RGZR
Set programming	Yes
Vcc(program)	3.3
Package