Adapters for Automated Programmers
8th Gen | 9th Gen |
FVE4ASMR64QFNA, FVE4ASMR64QFNA | FVE4ASMR64QFNA |
Adapters for Manual Programmers
8th Gen | 9th Gen |
FVE4ASMR64QFNA, FVE4ASMR64QFNA | FVE4ASMR64QFNA |
Adapters for Engineering Programmers
Last Updated: 05/18/2023
If the device is not yet supported by your BPM programmer (Generation), request Device Support
Note
IMPORTANT:
Device Type: | Microcontroller |
Algorithm Verify method: | I2C Mode |
Memory Organization:
Memory Type |
Attributes(*)
|
DUT Physical Register Address(hex)(if this area is selected/Activated) | BPWin Buffer Byte Address(hex) |
Register Address | R | 54h-55h | 54h-55h |
*R: Read only Special Device Considerations:This is a custom algorithm for BTV.The verify command performs the following:a) Verify the content of Data Pattern on 0x54 1) Write 0x11 to the I2C register @0x40 (ANA_IA_CNTL). 2) Write 0x54 to the I2C register @0x41 (ANA_IA_ADR). 3) Read the content of the selected shadow register by reading the I2C value @0x42 (ANA_IA_DATA). Compare the read back value against the data in BPWin Buffer at location 0x54. Verification will fail if they do not match.b) Verify the content of Data Pattern on 0x55. 1) Write 0x55 to the I2C register @0x41 (ANA_IA_ADR). 2) Read the content of the selected shadow register by reading the I2C value @0x42 (ANA_IA_DATA). Compare the read back value against the data in BPWin Buffer at location 0x55. Verification will fail if they do not match.Please fill the expected values in the Data Pattern at addresses [54h-55h]. ‘
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Additional information
8-bit Bytes | 86 |
---|---|
Manufacturer | Texas Instruments |
Packages | VQFN(64) |
Part Number | DS90UH947TRGCRGQ1 |
Set programming | Yes |
Vcc(program) | 1.8 |
Package |